NAND Flash Convolution Using XNOR/XOR Inversion Control

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Solution Overview

Problem

NAND flash memories cannot implement convolution operations due to their inability to sense '-1' as anything other than '0', which is essential for binary neural networks.

Innovation Solution

A method for controlling a NAND flash memory to perform convolution operations by performing XNOR or XOR operations on data and obtaining results, where the data and associated data are mutually inverted, allowing for the calculation of convolution operation results through sum manipulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If NAND flash memory performs conventional sensing operations, then it can detect binary values, but it cannot distinguish '-1' from '0' which prevents convolution operation implementation

Engineering Contradiction:
Improveconvolution operation capabilityVSAvoiddata sensing accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent changes the sensing parameter by applying different voltages to bit lines (first voltage for XNOR, second voltage for XOR) to enable the memory to perform logical operations and generate differentiated results that represent both positive and negative values, thus achieving convolution operations while maintaining sensing accuracy through voltage-controlled differentiation

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an intermediary computation mechanism where the memory performs XNOR and XOR operations as intermediate steps, and the controller calculates the difference between these results to obtain the final convolution output, effectively mediating between the memory's limited sensing capability and the required convolution functionality

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If NAND flash memory directly implements convolution operations, then computational functionality is achieved, but the sensing limitation of not distinguishing '-1' from '0' creates interference

Engineering Contradiction:
Improvecomputational functionalityVSAvoidsensing interference
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful sensing limitation into a beneficial feature by using the memory's inability to distinguish '-1' from '0' as the basis for XNOR operations, where the uniform detection behavior becomes the mechanism for achieving logical equivalence and enabling convolution computation through differential measurement

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Measurement precision

If the memory performs XNOR and XOR operations with inverted data, then accurate convolution results are obtained, but the operation complexity increases

Engineering Contradiction:
Improveconvolution result accuracyVSAvoidoperation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the convolution operation into two distinct phases: first performing XNOR operations with original data, then performing XOR operations with inverted data, and finally calculating the difference. This segmentation allows each operation to be simple and well-defined, reducing overall complexity while ensuring accurate results through systematic decomposition

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240193224A1Method for controlling NAND flash memory to implement convolution operation
Publication Date: 2024.06.13 UNIM INNOVATION (WUXI) CO LTD
  • US20240193224A1 patent drawing
  • US20240193224A1 patent drawing
  • US20240193224A1 patent drawing

AI summary

The present invention provides a method for controlling a NAND flash memory to implement a convolution operation, including: performing an XNOR operation on multiple pieces of first data and data associated with the multiple pieces of first data by a NAND flash memory, and obtaining a sum of XNOR operation results; and obtaining a convolution operation result according to the sum of the XNOR operation results and a total amount of the first data, or performing an XOR operation on multiple pieces of second data and data associated with the multiple pieces of second data by the NAND flash memory, obtaining a sum of XOR operation results, and obtaining a convolution operation result according to the sum of the XNOR operation results and the sum of the XOR operation results, where the first data and the second data have same bits and are mutually inverted data, and the data associated with the second data and the data associated with the first data are mutually inverted data. The convolution operation is implemented by the NAND flash memory, which avoids interference of “0”.