NAND Flash Memory Layout Using Convolutional Coding Across Chips
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Solution Overview
Problem
Conventional flash memory technologies face challenges in effectively correcting errors beyond a certain limit, leading to data loss due to individual bit errors in solid-state non-volatile memory devices like NAND flash, which are more prone to such errors compared to traditional hard disks.
Innovation Solution
The implementation of convolutional encoding and decoding methods that spread error correction codes across multiple non-volatile memory devices, using a high code rate and puncturing techniques to enhance error correction capabilities and reduce vulnerability to single-device errors, while maintaining compatibility with existing systems by mimicking conventional hard disk operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction codes are used in flash memory, then errors within correction capability can be corrected, but errors beyond the correction limit cannot be corrected leading to data loss
Solution Approach 1:
The patent divides the error correction task into multiple stages: first using block codes to correct errors within their capability, then using convolutional codes to correct remaining errors that exceed block code capabilities. This segmentation of error correction functions allows the system to handle errors beyond what a single correction method could manage alone.
Solution Approach 2:
The patent applies preliminary error correction using block codes before data is lost, then uses convolutional codes as a secondary correction layer. This preliminary action approach allows the system to correct errors progressively before they become uncorrectable, extending the overall error correction capability beyond what conventional single-stage methods provide.
2Reliability
If data is stored in a single flash memory device, then storage is simple, but the device is vulnerable to individual bit errors causing data loss
Solution Approach 1:
The patent segments data storage across multiple flash memory devices, with each device storing portions of the convolutionally coded data. This segmentation distributes the risk of bit errors across multiple devices, so that errors in one device do not result in complete data loss.
Solution Approach 2:
The patent introduces convolutional coding as an intermediary layer between the data and storage devices. This intermediary encoding scheme adds redundancy that enables error correction, mediating the harmful effect of bit errors that occur during storage in multiple devices.
3Reliability
If convolutional encoding with high code rate and puncturing is implemented, then error correction capability is enhanced, but device complexity increases
Solution Approach 1:
The patent segments the encoding process into two distinct stages: block code encoding followed by convolutional encoding with puncturing. This segmentation allows each encoding stage to be optimized independently and simplifies the overall implementation by breaking down the complex error correction task into manageable components.
Solution Approach 2:
The patent employs parameter changes in the convolutional encoding process, specifically using high code rates and puncturing patterns that can be adjusted to balance error correction capability against complexity. By optimizing these parameters, the system achieves enhanced error correction while managing the complexity through standardized encoding schemes.
Data Source
AI summary
Apparatus and methods are disclosed, such as those that store data in a plurality of non-volatile integrated circuit memory devices, such as NAND flash, with convolutional encoding. A relatively high code rate for the convolutional code consumes relatively little extra memory space. In one embodiment, the convolutional code is spread over portions of a plurality of memory devices, rather than being concentrated within a page of a particular memory device. In one embodiment, a code rate of m/n is used, and the convolutional code is stored across n memory devices.