NAND Flash Memory Layout With Cross-Device Convolutional ECC
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional flash memory technologies face challenges in effectively correcting errors beyond a certain limit, leading to data loss due to individual bit errors in solid-state non-volatile memory devices like NAND flash, which are more prone to such errors compared to traditional hard disks.
Innovation Solution
The implementation of convolutional encoding and decoding methods that spread error correction codes across multiple non-volatile memory devices, using a high code rate and puncturing techniques to enhance error correction capabilities and reduce vulnerability to errors, while maintaining compatibility with existing systems by mimicking conventional hard disk operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction codes are used in flash memory, then data can be corrected within certain error limits, but data loss occurs when errors exceed these limits
Solution Approach 1:
The invention divides data into multiple data stripes and distributes them across multiple flash memory devices. Each stripe is independently encoded with error correction codes, allowing the system to recover from errors in individual stripes without losing the entire dataset. This segmentation enables granular error recovery where only affected portions need to be reconstructed.
Solution Approach 2:
The system introduces an intermediary recovery mechanism that monitors error rates in real-time during read operations. When error rates approach the correction threshold, the system proactively initiates data reconstruction by reading from surviving stripes and rewriting to replacement stripes, serving as a mediator between error occurrence and data loss.
2Device complexity
If data is stored in a single flash memory device, then storage is simple, but the device is vulnerable to individual bit errors
Solution Approach 1:
The invention segments data storage across multiple flash memory devices, creating distributed data stripes. This segmentation transforms a single-point-failure architecture into a distributed system where errors in one device do not compromise the entire dataset, as recovery can proceed using data from other devices.
Solution Approach 2:
The system dynamically adjusts operational parameters based on error rates, including switching between read modes (once vs. multiple times), adjusting verification thresholds, and modifying reconstruction strategies. These parameter changes allow the system to adapt to varying error conditions while maintaining storage efficiency.
3Reliability
If error correction codes are applied to all data, then robustness against errors is improved, but storage capacity is reduced due to overhead
Solution Approach 1:
The invention applies error correction codes selectively to individual data stripes rather than uniformly to all data. This segmented approach allows the system to allocate ECC resources dynamically, applying stronger correction to high-risk stripes while using lighter protection for more reliable data, thereby optimizing the balance between robustness and storage capacity.
Solution Approach 2:
The system implements partial error correction by focusing resources on correcting errors in critical or high-error-rate stripes rather than uniformly protecting all data. This partial action approach ensures that the most vulnerable data receives adequate protection while minimizing the overall ECC overhead on storage capacity.
4Reliability
If data is read multiple times to verify correctness, then error detection is improved, but read speed is reduced
Solution Approach 1:
The invention implements dynamic read verification that adapts the number of read attempts based on real-time error rate monitoring. When error rates are low, the system performs single reads for speed. When error rates increase, the system dynamically increases verification reads, creating a flexible strategy that optimizes the trade-off between error detection and read speed based on current conditions.
Solution Approach 2:
The system incorporates feedback loops that monitor read results and error rates, using this information to adjust subsequent read operations. If initial reads succeed with low error rates, the system reduces verification overhead. If errors are detected, the feedback mechanism triggers additional verification reads or initiates reconstruction procedures, creating an adaptive read strategy.
Data Source
AI summary
Apparatus and methods are disclosed, such as those that store data in a plurality of non-volatile integrated circuit memory devices, such as NAND flash, with convolutional encoding. A relatively high code rate for the convolutional code consumes relatively little extra memory space. In one embodiment, the convolutional code is spread over portions of a plurality of memory devices, rather than being concentrated within a page of a particular memory device. In one embodiment, a code rate of m/n is used, and the convolutional code is stored across n memory devices.