NAND Flash Copyback Error Detection and Block Retirement

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Solution Overview

Problem

Internal copyback operations in NAND flash memory systems can lead to errors due to the absence of error detection and correction mechanisms, resulting in unnecessary retirement of blocks and potential SSD capacity depletion.

Innovation Solution

A storage controller is implemented to monitor error rates during copyback operations, identify and retire the failed block, and manage metadata to track defective source blocks, thereby preventing unnecessary block retirement and maintaining SSD capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If copyback operations are performed in NAND flash memory systems, then data can be moved between locations for memory management, but errors occur due to the absence of internal error detection and correction

Engineering Contradiction:
Improvememory management capabilityVSAvoiddata integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system performs a read operation after the copyback to verify data integrity. The controller compares the read data with the original source data to detect errors. This feedback mechanism allows the system to maintain the versatility of copyback operations while ensuring data reliability through post-operation verification.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs error detection before the copyback operation by reading the source block and comparing it with the destination block. This preliminary verification prevents erroneous data from propagating, allowing the system to maintain both the flexibility of copyback operations and the reliability of data integrity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If blocks with errors are retired unnecessarily, then data integrity is maintained, but SSD capacity is depleted

Engineering Contradiction:
Improvedata integrityVSAvoidSSD capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The system uses feedback from the read operation to determine whether a block should be retired. By comparing the read data with the original source data, the controller can identify actual errors versus false positives. This feedback mechanism prevents unnecessary block retirement while maintaining data integrity, thereby preserving SSD capacity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system changes the parameter of error detection sensitivity by using a threshold-based comparison approach. Instead of retiring all blocks with any error, the system uses a threshold to distinguish between acceptable and unacceptable error rates, preventing unnecessary block retirement and preserving SSD capacity.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If error detection is implemented during copyback, then data integrity is improved, but additional operations increase system complexity

Engineering Contradiction:
Improvedata integrityVSAvoidcontroller operations
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system performs error detection as a preliminary action before finalizing the copyback operation. By reading the source block and comparing it with the destination block before completing the transfer, the system ensures data integrity without requiring complex real-time error correction mechanisms during the copyback process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses the existing read operation capability of the NAND flash memory system to perform error detection. Instead of adding separate complex error detection hardware or operations, the system leverages the self-service read function already present in the memory system, thereby improving data integrity without significantly increasing device complexity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11145389B2Detection and error-handling of high error rate blocks during copyback
Publication Date: 2021.10.12 INTEL NDTM US LLC
  • US11145389B2 patent drawing
  • US11145389B2 patent drawing
  • US11145389B2 patent drawing

AI summary

An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to control a persistent storage media including a first media to store one or more source blocks of data and a second media to store one or more destination blocks of data, determine if an error rate associated with a read of a particular destination block of the one or more destination blocks exceeds a threshold error rate, identify a particular source block of the one or more source blocks which corresponds to erroneous data in the particular destination block, determine which of the particular source block and the particular destination block is a failed block, and retire the failed block. Other embodiments are disclosed and claimed.