NAND Flash Core Oxide Layer CD Control via Wet Etching
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Solution Overview
Problem
In semiconductor manufacturing for NAND flash, double patterning techniques face challenges in achieving consistent critical dimensions due to etching process limitations, leading to failures in read-write crossfeed in memories where the bottom portion of the etched pattern is high and the top portion is low.
Innovation Solution
A method optimizing critical dimensions involves forming a core oxide layer on a substrate, densifying it through sub-high temperature annealing, measuring and adjusting etching rates, and performing wet etching to achieve consistent top and bottom dimensions in the core pattern, ensuring precise control of morphology and size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If double patterning is adopted to reduce critical dimension, then storage cell size is reduced, but etching process limitations cause inconsistent CD sizes between top and bottom of core pattern
Solution Approach 1:
The patent applies preliminary action by performing a first wet etching process on the core oxide layer before the main dry etching process. This preliminary etching creates a tapered profile that compensates for the expected over-etching effect, ensuring that after the main etching process, the top and bottom of the core pattern achieve consistent CD sizes. The preliminary action anticipates and corrects the etching non-uniformity before the final pattern formation.
Solution Approach 2:
The patent changes the etching parameters by using two different etching methods (wet etching followed by dry etching) with different etching rates and selectivities. The first wet etching process uses a slower etching rate to create a controlled tapered profile, while the subsequent dry etching process uses a faster etching rate to complete the pattern formation. This parameter change allows compensation for etching loss and achieves consistent CD dimensions.
2Length of moving object
If core oxide layer is etched to form core pattern, then critical dimension is reduced, but upper half etches faster than lower half causing bottom height inconsistency
Solution Approach 1:
The patent applies preliminary action by performing a first wet etching process on the core oxide layer before the main dry etching process. This preliminary etching creates a tapered profile that compensates for the expected over-etching effect, ensuring that after the main etching process, the top and bottom of the core pattern achieve consistent CD sizes. The preliminary action anticipates and corrects the etching non-uniformity before the final pattern formation.
Solution Approach 2:
The patent changes the etching parameters by using two different etching methods (wet etching followed by dry etching) with different etching rates and selectivities. The first wet etching process uses a slower etching rate to create a controlled tapered profile, while the subsequent dry etching process uses a faster etching rate to complete the pattern formation. This parameter change allows compensation for etching loss and achieves consistent CD dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively controls the morphology and critical dimensions of the core pattern, resulting in consistent top and bottom sizes, improving product yield and preventing failures in read-write crossfeed, especially in 40 nm and below process nodes.
Implementation Method 1
densifying the core oxide layer; a method for densifying the core oxide layer is performed by adopting a sub-high temperature annealing method
Implementation Method 2
etching the core oxide layer to form a core pattern; the core oxide layer is etched by adopting dry etching to form the core pattern; the same etching condition is wet etching performed by adopting DHF or BHF
Data Source
AI summary
The present invention provides a method for optimizing a critical dimension for double patterning for NAND flash, forming a core oxide layer on amorphous silicon layer on substrate; densifying the core oxide layer and etching it to form a core pattern; measuring CD values of the bottom and top of the core pattern; providing etching rates of a non-densified core oxide layer and a densified core oxide layer under the same etching condition; calculating the thickness of the core oxide layer required to be densified according to the CD values of the bottom and top of the core pattern and the etching rates to determine the densifying time. The present invention precisely controls the morphology and CD, and obtains a double-patterned target pattern with consistent CD sizes of a top and a bottom and a consistent bottom height, so as to improve a product yield.