NAND Flash Read Compensation for Floating Gate Coupling
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Solution Overview
Problem
Floating gate-to-floating gate coupling in NAND flash memory devices leads to erroneous read operations due to shifts in apparent charge storage, particularly in multi-state devices with narrower threshold voltage ranges, causing read errors as storage elements are shifted from allowed to forbidden voltage ranges.
Innovation Solution
A method and system that compensates for coupling effects by adjusting read pass voltages based on the number of program-erase cycles and states of selected storage elements, using a non-volatile memory system with a NAND flash structure, where read operations are optimized to minimize the impact of floating gate coupling by applying specific read pass voltages to unselected word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read operations are performed on storage elements after adjacent storage elements are programmed, then data can be retrieved, but coupling effects cause shifts in apparent charge storage leading to read errors
Solution Approach 1:
The patent applies preliminary anti-action by determining the state of adjacent unselected storage elements before performing the read operation on selected storage elements. Based on this preliminary determination, compensating read pass voltages are applied to the unselected storage elements to counteract the coupling effects that would otherwise cause threshold voltage shifts and read errors. This proactive compensation prevents the harmful coupling effect from corrupting the read data.
2Productivity
If multiple program-erase cycles are performed to increase storage capacity utilization, then more data can be stored, but coupling effects widen threshold voltage distributions causing read errors
Solution Approach 1:
The patent implements preliminary action by tracking the number of program-erase cycles and determining the states of adjacent storage elements before each read operation. This preliminary information is used to select appropriate compensating read pass voltages that account for the cumulative coupling effects from multiple program-erase cycles. By preparing the compensation strategy in advance based on cycle history, the system maintains read accuracy despite threshold voltage distribution widening.
3Reliability
If read pass voltages are applied to unselected word lines to compensate for coupling, then read errors are reduced, but additional voltage application steps increase operation complexity
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the read pass voltage levels based on the determined states of adjacent storage elements and the number of program-erase cycles. Instead of using fixed voltage levels, the system modifies the voltage parameters to compensate for coupling effects. This allows the read operation to adapt to different coupling conditions while maintaining a relatively streamlined process flow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces read errors by compensating for the widened threshold voltage distributions caused by floating gate coupling, ensuring accurate data retrieval even after multiple program-erase cycles.
Implementation Method 1
a floating gate that is used to store two ranges of charges
Implementation Method 2
coupling of an electric field based on the charge stored in neighboring floating gates
Implementation Method 3
electrons from the channel of a cell or memory element, e.g., storage element, to be injected into the floating gate
Data Source
AI summary
A read operation for non-storage elements compensates for floating gate-to-floating gate coupling and effects of program-erase cycles. During programming of a word line WLn+1, the threshold voltages of previously-programmed storage elements on WLn are increased due to coupling. To compensate for the increase, during a subsequent read operation of WLn, different sets of pass voltages are applied to WLn+1 for each control gate read voltage which is applied to WLn. The pass voltages vary in each different set so that they are a function of the control gate read voltage which is applied to WLn. The pass voltages may also be a function of a number of program-erase cycles. A higher amount of compensation is provided by increasing the pass voltages as the number of program-erase cycles increases.