NAND Flash Data Merging via Partial Synchronization
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Solution Overview
Problem
The reliability of data merging in MLC and TLC NAND flash memory systems is compromised due to differences in writing speeds and error susceptibility between lower, middle, and upper physical pages, leading to data loss and inefficiencies in the merging process.
Innovation Solution
A data merging method that involves assigning log physical blocks, performing data arrangement and move operations with partial synchronization, and remapping logical blocks to improve data reliability and efficiency by leveraging the faster writing speed of lower physical pages and managing data across multiple physical pages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data are written into upper physical pages in MLC/TLC NAND flash memory, then storage capacity is increased, but writing speed decreases and error susceptibility increases
Solution Approach 1:
The patent divides the physical block into multiple physical pages (lower, middle, upper pages) and assigns different functions to each page based on their writing characteristics. The lower physical page is designated for high-speed data storage while upper pages are used for additional capacity, effectively segmenting the storage function to optimize both speed and capacity.
Solution Approach 2:
The patent applies local quality by treating different physical pages differently according to their specific characteristics. Each physical page is assigned different roles: lower pages handle time-critical data writes while upper pages provide extended storage capacity, optimizing the system by leveraging the specific properties of each location.
2Reliability
If data merging is performed in conventional NAND flash memory, then data reliability is improved, but the process time increases and efficiency decreases
Solution Approach 1:
The patent performs preliminary actions by pre-establishing the lower physical page as the primary write target and pre-configuring the data arrangement sequence. This allows the data merging process to proceed more efficiently by following a predetermined optimal path, reducing overall merge time while maintaining reliability.
Solution Approach 2:
The patent ensures continuity of useful action by maintaining the lower physical page as the active write target throughout the data merging process. This continuous utilization of the high-speed lower page for data arrangement and temporary storage eliminates idle time and optimizes the merging workflow, reducing total process time while preserving data reliability.
3Quantity of substance
If all physical pages are used for data storage, then storage capacity is maximized, but error susceptibility increases and data loss may occur
Solution Approach 1:
The patent segments the physical block into distinct functional zones: lower physical pages for reliable high-speed storage and upper physical pages for additional capacity. This segmentation allows the system to maximize storage capacity while concentrating error-prone operations in specific zones, thereby maintaining overall reliability.
Solution Approach 2:
The patent implements beforehand cushioning by designating the lower physical page as a protective buffer for critical data. This pre-established safe zone acts as a cushion against errors in upper pages, ensuring that even if upper pages fail, the lower page preserves essential data, thus maintaining system reliability while maximizing storage capacity through the use of all pages.
Data Source
AI summary
A data merging method for merging valid data of one logical block in a rewritable non-volatile memory module is provided. The method includes assigning a plurality of log physical blocks for the logical block. The method also includes performing a data arrangement operation and a data move operation with a partial synchronization manner to copy the valid data of the logical block into the lower physical pages of the log physical blocks from a first data physical block and at least one spare physical block while programming the valid data of the logical block into a second data physical block from the lower physical pages of the log physical blocks in units of each physical page group. The method further includes remapping the logical block to the second physical block. Accordingly, the method can effectively shorten the time of merging valid data and improving the reliability of data writing.