NAND Flash Data Restructuring for Error Rate Reduction
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Solution Overview
Problem
NAND flash memory devices, particularly 3D NAND flash memory, face reliability and endurance issues due to increasing error rates and degradation over write-erase cycles, which limit their lifetime and require costly correction mechanisms.
Innovation Solution
A method of restructuring input data by segmenting it into logical output pages and assigning them to destination data pages based on the level of the destination data pages, content of the input pages, and a memory reliability optimization goal, aiming to minimize stress on flash memory cells and extend their lifetime.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level flash memory cells are scaled into smaller semiconductor technology nodes to increase capacity, then storage capacity and cost efficiency are improved, but error rates increase and reliability deteriorates
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different data pages based on their susceptibility to errors. It identifies critical data pages (those more prone to errors due to scaling effects) and applies enhanced error correction mechanisms specifically to these pages, rather than uniformly across all pages. This allows the system to maintain high storage capacity through scaling while selectively reinforcing reliability where it is most needed.
2Adaptability or versatility
If write-erase cycles are performed to update data in NAND flash memory, then data updates are enabled, but permanent damage accumulates and lifetime is limited
Solution Approach 1:
The patent implements preliminary action by performing error detection and correction operations before data degradation becomes critical. It continuously monitors the health status of flash memory cells and proactively applies error correction mechanisms to prevent permanent damage accumulation. This proactive approach allows the system to maintain data integrity through multiple write-erase cycles without reaching the end of the memory's lifetime.
3Reliability
If error correction mechanisms are implemented to improve reliability, then error rates are reduced, but device complexity and cost increase
Solution Approach 1:
The patent applies segmentation by dividing the flash memory into different categories of data pages based on their error susceptibility. It segments the error correction mechanisms into different levels or types, applying more robust correction to critical pages and lighter correction to less vulnerable pages. This segmented approach reduces overall device complexity compared to applying maximum error correction uniformly across all data.
4Quantity of substance
If data is stored in multi-level flash memory cells, then storage density is increased, but susceptibility to circuit-level noises increases
Solution Approach 1:
The patent introduces an intermediary error detection and correction system that acts as a mediator between the stored data and potential noise interference. This intermediary mechanism continuously monitors data integrity and actively counteracts the effects of circuit-level noises that would otherwise directly corrupt the stored data. The intermediary system enables high storage density through multi-level cells while providing protective functionality against noise susceptibility.
Data Source
AI summary
Provided is a method and a data processing apparatus for restructuring input data to be stored in a flash memory having a plurality of multi-level flash memory cells. The method comprises: based on a defined page structure according to which the input data is segmented into multiple logical input pages, restructuring the segmented input data to obtain corresponding output data being segmented into logical output pages, wherein each output page has one or more associated destination data pages for storing content of the output page therein; and outputting the segmented output data for storage to the flash memory in accordance with the associations between the output pages and their respective destination data pages. The restructuring comprises assigning to each output page a respective corresponding input page, and selecting the respective input page for assignment to the respective output page.