Multi-Chip Package NAND Flash Device Selection via Command Bus
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Solution Overview
Problem
Conventional multi-chip package (MCP) configurations for NAND flash memory systems require separate chip enable pins for each flash device, leading to increased pin count and configuration changes when adding more devices, which complicates system design and burdens the flash memory controller.
Innovation Solution
A memory system with a memory controller and multiple memory devices connected via a common bus with a multi-drop connection, where device selection is performed using a command processor or device identifier comparator, allowing for device selection without individual CE# pins, and using a command structure or input address to identify and select specific devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate chip enable pins are used for each flash device in MCP configuration, then device selection is achieved, but pin count increases and system configuration becomes complex
Solution Approach 1:
The patent merges the device selection function into the existing command structure by incorporating device ID fields within command words. Multiple devices are selected through command-based identification rather than separate physical pins, combining the selection mechanism with the data bus already present in the system.
Solution Approach 2:
The command bus serves multiple functions: it transmits data between the controller and flash devices, and simultaneously performs device selection through embedded device ID fields. This multi-functional approach eliminates the need for dedicated selection pins while maintaining reliable device identification.
2Quantity of substance
If more flash devices are added to MCP package, then memory capacity increases, but configuration changes are required
Solution Approach 1:
The system accommodates different numbers of devices by changing the parameter of device ID encoding within commands. The command structure is designed to support variable device counts through flexible device ID field interpretation, allowing the same hardware configuration to adapt to different memory capacity requirements without physical reconfiguration.
3Ease of operation
If individual CE# pins are provided for each device, then device control is simplified, but the burden on flash memory controller increases
Solution Approach 1:
The selection control function is merged with the data command transmission. The controller sends commands that contain both the operation type and device identification, combining what would traditionally be separate control signals into a unified command structure that reduces controller burden while maintaining ease of device control.
Data Source
AI summary
Device selection schemes in multi-chip package NAND flash memory systems are provided. A memory system is provided that has a memory controller, and a number of memory devices connected to the controller via a common bus with a multi-drop connection. The memory controller performs device selection by command. A corresponding memory controller is provided which performs device selection by command. Alternatively, device selection is performed by address. A memory device is provided use in memory system comprising a memory controller, and a number of memory devices inclusive of the memory device connected to the controller via a common bus with a multi-drop connection. The memory device has a register containing a device identifier, and a device identifier comparator that compares selected bits of a received input address to contents of the register to determine if there is a match. The memory device is selected if the device identifier comparator determines there is a match.