NAND Flash Programming via Drain-Induced Hot Electron Injection

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Solution Overview

Problem

Conventional NAND flash memory programming mechanisms suffer from high programming voltage and long programming time, leading to tunnel oxide damage and reduced lifespan of memory cells.

Innovation Solution

A method for programming NAND flash memory that involves applying a drain voltage and floating the source of the memory cell, followed by a programming voltage applied to the gate, with specific voltage and time parameters to complete programming efficiently, utilizing a tertiary electron collision principle.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional electronic tunneling programming mechanism is used, then programming can be performed on NAND flash memory, but high programming voltage and long programming time cause high stress on tunnel oxide layers, greatly affecting the lifespan of memory cells

Engineering Contradiction:

Improvelifespan of memory cellsVSAvoidstress on tunnel oxide layers

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the programming mechanism from conventional electronic tunneling to a mechanism based on hot electron injection and avalanche multiplication. This involves changing the voltage application pattern: applying high voltage to the drain (not the gate), floating the source, and using a lower programming voltage on the gate. This parameter change reduces stress on the tunnel oxide layer while maintaining programming effectiveness.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent replaces the conventional electronic tunneling mechanism with a new mechanism involving hot electron injection and avalanche multiplication. Instead of directly tunneling electrons through the oxide layer using high gate voltage, the patent uses drain-induced hot electrons that multiply through avalanche effects and inject into the floating gate, substituting a different physical mechanism that reduces oxide stress.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If conventional programming mechanism is used, then data can be programmed into NAND flash memory, but the programming time is long which reduces programming efficiency

Engineering Contradiction:

Improveprogramming efficiencyVSAvoidprogramming time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent changes the programming mechanism to achieve faster programming speeds. By applying drain voltage to generate hot electrons and using avalanche multiplication, the programming process completes in significantly shorter time compared to conventional tunneling methods, thereby improving programming efficiency and reducing time loss.

Inventive Principle:

Principle #35Parameter changes

3Use of energy by moving object

If conventional programming mechanism is used, then memory cells can be programmed, but high programming voltage increases power consumption

Engineering Contradiction:

Improvepower consumptionVSAvoidlifespan of memory cells

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent changes the voltage application strategy: instead of applying high voltage to the gate, the high voltage is applied to the drain where it generates hot electrons through field emission. The gate then uses a lower programming voltage to control the injection process. This parameter change reduces both power consumption and stress on the tunnel oxide layer.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces the gate voltage, shortens programming time, and improves the lifespan and efficiency of memory cells while reducing power consumption.

Implementation Method 1

applying a drain voltage to the drain of the to-be-programmed memory cell

Methodology Applied

Scientific EffectField emission:

Implementation Method 2

utilizing a tertiary electron collision principle

Methodology Applied

Scientific EffectElectron collision:

Implementation Method 3

applying a programming voltage to the gate of the to-be-programmed memory cell

Methodology Applied

Scientific EffectElectron tunneling:

Data Source

PatentUS11355196B2Method for programming NAND flash memory

Publication Date: 2022.06.07 CHINA FLASH CO LTD

AI summary

The present disclosure relates to a method for programming a NAND flash memory, which includes: providing a NAND flash memory array, and initializing a to-be-programmed memory cell; applying a drain voltage to the drain of the to-be-programmed memory cell, and floating the source of the to-be-programmed memory cell; and applying a programming voltage to the gate of the to-be-programmed memory cell, and discharging the voltage at each end of the to-be-programmed memory cell after maintaining the voltage for a first time period, to complete programming; a difference between the voltage applied to the drain and the voltage applied to the substrate of the to-be-programmed memory cell being not less than 4 V, the first time period being not longer than 100 μs, and the programming voltage being not higher than 10 V.