DRAM Cache for NAND Flash Data Programming
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Solution Overview
Problem
NAND flash memory devices are inefficient in random data access due to their serial access nature, requiring commands and addresses to be written in sequences, which complicates the caching and reading of data, necessitating methods to improve data access efficiency.
Innovation Solution
A method and apparatus that utilize a processing unit to cache data pages in DRAM, updating cache information to track whether data has been programmed into the storage unit, allowing for efficient data programming and reading by determining if a block of data has been collected and storing it in DRAM until a complete block is ready for programming, using cache information to identify unprogrammed data for direct retrieval from DRAM.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If NAND flash memory uses serial access method, then device complexity is reduced, but data access efficiency deteriorates
Solution Approach 1:
The patent introduces a cache memory as an intermediary between the host and NAND flash memory. The cache stores data pages that are being programmed, allowing the host to continue issuing commands without waiting for the slow serial programming operations to complete. This mediator buffer decouples the fast host interface from the slow flash interface, resolving the contradiction between simple serial access and efficient data access.
2Manufacturing precision
If data is programmed page by page serially, then manufacturing precision is maintained, but productivity deteriorates
Solution Approach 1:
The patent implements preliminary action by collecting multiple data pages in the cache memory before initiating the actual programming operation to the NAND flash. Instead of programming each page immediately as it arrives, the system accumulates a block of pages (e.g., 16 pages) and then programs them together in a single operation. This preliminary collection phase allows the host to quickly fill the cache while maintaining precise page-by-page data reception, then performs bulk programming to achieve high throughput without sacrificing programming accuracy.
Data Source
AI summary
The invention introduces a method for caching and reading data to be programmed into a storage unit, performed by a processing unit, including at least the following steps. A write command for programming at least a data page into a first address is received from a master device via an access interface. It is determined whether a block of data to be programmed has been collected, where the block contains a specified number of pages. The data page is stored in a DRAM (Dynamic Random Access Memory) and cache information is updated to indicate that the data page has not been programmed into the storage unit, and to also indicate the location of the DRAM caching the data page when the block of data to be programmed has not been collected.