NAND Flash Memory Dummy Read Stabilizes Threshold Voltage

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Solution Overview

Problem

In semiconductor memory devices, particularly NAND flash memory, there is a challenge in maintaining data retention and reliability due to the 'creep-up' phenomenon where the voltage of the word lines rises after a read operation, causing threshold voltage shifts over time, which can lead to increased fail bit counts and retry read rates.

Innovation Solution

The implementation of a dummy read operation after a write operation and the ON/OFF operation of selected block transistors helps prevent the transition from the second state to the first state, thereby maintaining data retention and improving reliability by stabilizing the threshold voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a read operation is performed in NAND flash memory, then data can be retrieved, but the voltage of word lines rises (creep-up phenomenon) causing threshold voltage shifts over time

Engineering Contradiction:
Improvedata retentionVSAvoidthreshold voltage stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent applies a preliminary action by performing a dummy read operation after the write operation and before actual read operations. This dummy read stabilizes the word line voltages by preventing the creep-up phenomenon, ensuring that subsequent read operations occur under stable voltage conditions. The dummy read acts as a preventive measure that restores the voltage distribution to its initial state.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the operational parameters of the memory system by introducing an additional read operation (dummy read) with specific timing and voltage conditions. This parameter change involves applying read voltages to word lines in a controlled sequence after writing, which redistributes charges and stabilizes the voltage potential across word lines, thereby preventing threshold voltage shifts.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If multiple read operations are performed after write operation, then data access is enabled, but fail bit counts and retry read rates increase due to voltage instability

Engineering Contradiction:
Improveread operation efficiencyVSAvoiddata retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The dummy read operation serves as a preliminary action that prepares the memory system for subsequent read operations by stabilizing word line voltages. This preliminary stabilization prevents the accumulation of voltage shifts that would otherwise lead to increased fail bit counts and retry read rates, ensuring reliable data access.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by performing the dummy read operation to cushion against the harmful effects of voltage creep-up. This preventive measure absorbs the potential damage to data retention that would occur during subsequent read operations, ensuring that the memory system maintains reliability even under repeated access conditions.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS10748631B2Semiconductor memory device
Publication Date: 2020.08.18 KIOXIA CORP
  • US10748631B2 patent drawing
  • US10748631B2 patent drawing
  • US10748631B2 patent drawing

AI summary

A semiconductor memory device includes a memory string with a first selection transistor, a first memory cell, a second memory cell, and a second selection transistor connected in series. A first word line connects to the first memory cell, and a second word line connects to the second memory cell. Selection gates line are connected to first and second selection transistors. A control circuit is configured to control a write operation on the first memory string. The write operation includes a program loop with a program operation and a program verification operation. After the program loop is completed, a first voltage is applied to the first and second word lines and a second voltage is applied to the selection gate lines. The first voltage is sufficient to turn on the first and second memory cells. The second voltage is sufficient to turn on the selection transistors.