NAND Flash Memory Dummy Read Stabilizes Threshold Voltage

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Solution Overview

Problem

The reliability of read operations in NAND-type flash memory systems is compromised due to the 'creep up' phenomenon, where the threshold voltage of memory cell transistors fluctuates, affecting data integrity and accuracy.

Innovation Solution

The implementation of a dummy read operation is introduced, where the memory system performs a read operation without outputting data, optimizing the read voltage to the second state, thereby stabilizing the threshold voltage and reducing fluctuations, and this is executed immediately after power-on and periodically during normal operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read operations are performed in NAND-type flash memory, then data can be retrieved, but the threshold voltage fluctuates due to the 'creep up' phenomenon, compromising data integrity

Engineering Contradiction:
Improveread operation reliabilityVSAvoidthreshold voltage stability
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by performing a dummy read operation before the actual read operation. This dummy read stabilizes the threshold voltage by pre-adjusting the read voltage to the second state, preventing the harmful 'creep up' phenomenon from affecting subsequent read operations. The dummy read prepares the memory cell in advance, ensuring stable threshold voltage for the actual data retrieval.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the harmful 'creep up' phenomenon into a beneficial effect by utilizing the voltage fluctuation that occurs during a dummy read operation. Instead of avoiding the threshold voltage change, the invention uses it to optimize the read voltage to the second state, which then stabilizes the threshold voltage for subsequent operations. The harmful voltage fluctuation becomes a mechanism for voltage optimization and stabilization.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If dummy read operations are performed to stabilize threshold voltage, then read operation reliability improves, but additional operation time is required

Engineering Contradiction:
Improveread operation reliabilityVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by performing a dummy read operation that executes only the essential voltage stabilization steps without completing the full data output process. The dummy read performs the critical function of optimizing read voltage and stabilizing threshold voltage, but omits unnecessary data retrieval and output steps. This partial execution of the read operation achieves the stabilization benefit while minimizing the time penalty.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If read voltage is optimized to the second state, then threshold voltage fluctuations are suppressed, but the system requires additional control mechanisms

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidvoltage control complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies self-service by designing the dummy read operation to automatically optimize the read voltage to the second state without requiring external intervention or complex control algorithms. The memory system itself performs the voltage optimization through the dummy read process, using its internal mechanisms to stabilize the threshold voltage. This self-service approach reduces the need for additional external control mechanisms while achieving voltage stability.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10346068B2Memory system and method of performing a read operation on a memory cell of a non-volatile semiconductor storage device including a plurality of blocks of memory
Publication Date: 2019.07.09 KIOXIA CORP
  • US10346068B2 patent drawing
  • US10346068B2 patent drawing
  • US10346068B2 patent drawing

AI summary

A memory system includes a semiconductor storage device including a plurality of blocks of memory cells, each memory cell storing data in a non-volatile state, a controller configured to issue commands to the semiconductor storage device to perform various operations, including a read operation, a write operation, an erase operation, and a dummy operation. The read operation is an operation in which the semiconductor storage device reads data from a memory cell of a block in the semiconductor storage device, and outputs the read data to the controller, and the dummy operation is an operation in which the semiconductor storage device reads data from a memory cell of a block in the semiconductor storage device and does not output the read data to the controller and does not write the data to any of the memory cells of the blocks in the semiconductor storage device.