NAND Flash Storage Dynamic SLC-MLC Block Allocation
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Solution Overview
Problem
Current NAND flash-based solid state drives face challenges in maintaining data integrity and endurance due to trapped charges in the oxide layer, leading to over-programming and failure in multi-level cell (MLC) and triple-level cell (TLC) flash memory, which are less robust and more prone to errors compared to single-level cell (SLC) flash memory.
Innovation Solution
A NAND flash-based storage device dynamically allocates blocks between an overprovisioning pool and a user memory pool, using a first mode for programming one bit per cell like SLC for fast host writes and a second mode for programming two or more bits per cell like MLC/TLC, allowing blocks to cycle between pools based on wear history, effectively treating MLC cells as SLC for improved reliability and endurance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cell (MLC) or triple-level cell (TLC) flash memory is used to increase storage capacity, then the storage capacity is improved, but data integrity and reliability deteriorate due to trapped charges causing over-programming and errors
Solution Approach 1:
The patent segments the flash memory into distinct pools: an overprovisioning pool operating in SLC mode (one bit per cell) for reliable fast writes, and a user memory pool operating in MLC/TLC mode (two or more bits per cell) for high capacity storage. This segmentation allows each pool to be optimized for its specific function, resolving the contradiction between capacity and reliability.
Solution Approach 2:
Different operational modes are applied to different regions of the flash memory. The overprovisioning pool uses SLC mode with fewer bits per cell for high reliability, while the user memory pool uses MLC/TLC mode with more bits per cell for high capacity. This local differentiation of quality allows the system to simultaneously achieve both high capacity and high reliability in appropriate locations.
2Productivity
If SLC mode is used for fast writes in the overprovisioning pool, then write speed and reliability are improved, but storage capacity is reduced compared to MLC/TLC mode
Solution Approach 1:
The patent implements dynamic configuration where blocks can be moved between the overprovisioning pool and user memory pool based on wear history and performance requirements. This dynamic allocation allows the system to adaptively balance between fast reliable storage and high capacity storage, optimizing both write speed and storage capacity at different times as needed.
3Duration of action of stationary object
If blocks are dynamically cycled between overprovisioning pool and user memory pool based on wear history, then endurance is extended, but device complexity increases
Solution Approach 1:
The patent changes the operational parameter of blocks from fixed mode to dynamic mode based on wear history. Blocks that have undergone extensive wear are moved from the user memory pool to the overprovisioning pool where they can continue to serve in SLC mode with higher reliability requirements. This parameter change based on wear state extends the overall endurance of the device while managing complexity through automated wear tracking.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces error rates, simplifies error checking, and extends write endurance by using blocks with marginal functionality for fast writes, ensuring no capacity loss to the user and allowing for efficient data management through dynamic configuration of blocks between SLC and MLC modes.
Implementation Method 1
The process of programming (writing 0's to) a NAND cell requires applying a programming voltage to the control gate, which causes the injection of electrons into the floating gate by quantum mechanical tunneling.
Implementation Method 2
The floating gate is separated from the control gate by an oxide layer and from the channel by another oxide layer, referred to as the tunnel oxide.
Data Source
AI summary
A solid state drive having at least one NAND flash memory component organized in blocks, pages and cells. Each cell is adapted to store at least two bits. Each block of the memory component is adapted to be dynamically configured to store at least one bit per cell using a first mode of operation and dynamically configured to store at least two bits per cell using a second mode of operation while the mass storage device is operating, wherein the first mode of operation entails programming fewer bits of a cell in fewer passes as compared to the second mode of operation.