NAND Flash ECC Matrix Flipping for Uncorrectable Bit Errors
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Solution Overview
Problem
NAND flash memory experiences increasing bit error rates due to memory wear and technological scaling, necessitating improved error correction techniques that do not compromise storage capacity or increase costs.
Innovation Solution
The method involves encoding data in two dimensions using Error Correction Codes (ECC) and applying matrix error flipping correction to extend the correction limits, allowing for recursive decoding and error correction beyond the initial ECC capacity by forming and flipping error matrices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If more parity bits are allocated to increase error correction capability, then the number of correctable errors increases, but the storage capacity of flash memory decreases
Solution Approach 1:
The patent applies two-dimensional ECC encoding where data is encoded not only horizontally within pages but also vertically across multiple pages. This dimensional extension allows error correction capability to be improved without proportionally increasing the number of parity bits allocated per page, thereby maintaining storage capacity while enhancing reliability.
Solution Approach 2:
The patent creates a multi-functional error correction system that handles both page-level errors (using traditional ECC) and cross-page errors (using vertical ECC and matrix flipping). This universal approach allows the same parity bits to serve multiple correction purposes, improving error correction capability without linearly increasing storage overhead.
2Reliability
If traditional ECC is used to correct errors, then data integrity is maintained within ECC limits, but errors beyond ECC capacity cannot be corrected
Solution Approach 1:
The patent implements a dynamic error correction process that adapts to different error scenarios. When traditional ECC fails to correct errors, the system dynamically switches to matrix flipping correction for burst errors, and to vertical ECC for cross-page errors. This dynamic multi-stage approach extends the correction range while maintaining data integrity for various error types.
Solution Approach 2:
The patent introduces matrix flipping as an intermediary correction mechanism between traditional ECC and uncorrectable errors. When ECC identifies errors that exceed its correction capacity, matrix flipping serves as a mediator that can correct these otherwise uncorrectable burst errors, thereby extending the overall error correction range of the system.
3Reliability
If additional error correction mechanisms are added to handle errors beyond ECC limits, then correction capability is extended, but system complexity increases
Solution Approach 1:
The patent segments the error correction process into distinct stages: first ECC decoding, then matrix flipping correction for remaining errors, and finally vertical ECC for cross-page errors. This segmentation allows each mechanism to be optimized independently and applied only when needed, extending correction capability while managing system complexity through modular design.
Data Source
AI summary
A technique of extending a correction limit defined by an ECC is described. According to one aspect of the present invention, remaining errors that cannot be corrected by the ECCs in a data array is first identified and then formed in form of matrix with defined size. These remaining errors are flipped in value, namely from “1” to “0” or “0’ to “1” if the number of the errors are within a range or additional ECCs are applied to correct the errors in flipped data bits.