Dynamic Erasing Unit Partitioning for NAND Flash Wear Management
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Solution Overview
Problem
In NAND flash memory, the rapid aging of physical erasing units in the buffer area leads to data errors due to excessive usage, reducing the reliability and efficiency of flash memory systems, particularly in TLC NAND flash memory where data errors can occur when programming upper physical programming units.
Innovation Solution
A data writing method that partitions physical erasing units into a free area and a temporary area, dynamically selecting temporary physical erasing units based on average erasing counts to prevent data errors, using a single-page mode for temporary storage and copying data to a selected physical erasing unit in the free area for long-term storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If physical erasing units are used as buffer area for temporary storage in TLC NAND flash memory, then writing speed is improved, but the lifespan is reduced due to excessive erasing operations
Solution Approach 1:
The patent segments physical erasing units into different functional areas: buffer area for temporary storage and data area for permanent storage. This segmentation allows the system to use specific erasing units for high-frequency temporary operations without compromising the lifespan of erasing units used for long-term data storage, thereby resolving the contradiction between writing speed and lifespan.
Solution Approach 2:
The patent introduces a buffer area as an intermediary between the host system and the data area. The buffer area absorbs frequent write operations and temporary storage demands, preventing direct wear on the data area erasing units. This intermediary mechanism enables fast writing through single-page mode in the buffer while protecting the overall system lifespan.
2Quantity of substance
If upper physical programming units are programmed in TLC NAND flash memory, then storage capacity is improved, but data errors occur due to programming failures
Solution Approach 1:
The patent applies preliminary action by first programming the lower physical programming unit before attempting to program the upper physical programming unit. The system checks for programming success and only proceeds to program upper units if lower units are successfully programmed. This preliminary sequencing reduces data errors by ensuring a stable foundation before adding more complex storage operations.
Solution Approach 2:
The patent changes operational parameters by using single-page mode for buffer area operations and multi-page mode for data area operations. This parameter adjustment optimizes the programming process for different storage requirements, improving both capacity utilization and reliability by adapting the programming method to the specific operational context.
Data Source
AI summary
A data writing method for a rewritable non-volatile memory module, and a memory control circuit unit and a memory storage apparatus using the same are provided. The method includes partitioning physical erasing units of the rewritable non-volatile memory module into a temporary area and a free area. The method also includes dynamically selecting multiple physical erasing units from the temporary area, the free area, or both the temporary area and the free area as a temporary physical erasing unit group corresponding to a logical unit and using the temporary physical erasing units to write updated data to be stored into the logical unit via a single-page mode. Accordingly, the method can effectively prevent the data error occurring due to continuously using old physical erasing units of the temporary area for temporarily storing data and the method can improve the speed and the reliability of writing data.