NAND Flash Erasure Decoding for Faulty Cell Recovery
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Solution Overview
Problem
Solid state storage systems face challenges in correcting errors that exceed the capability of existing error correction codes, particularly due to manufacturing defects and voltage leakage in cells, leading to unsuccessful decoding attempts.
Innovation Solution
Implementing an error recovery process using erasures, where selected bits in a codeword are replaced with neutral values, allowing error correction decoding to fall within the error correction capabilities of the code, employing both non-destructive and destructive techniques to identify and replace faulty cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard error correction decoding is used, then decoding simplicity is maintained, but error correction capability is insufficient for defects exceeding code capability
Solution Approach 1:
The patent applies preliminary action by performing error detection and identifying erroneous bits before the final decoding process. The system uses a first decoding attempt to detect errors, then selectively replaces identified erroneous bits with erasure values before a second decoding attempt. This preliminary identification and replacement of errors enhances the overall error correction capability without requiring the decoding system to handle all possible error patterns from scratch.
Solution Approach 2:
The patent segments the error correction process into distinct stages: initial error detection, selective bit identification, erasure replacement, and final decoding. By dividing the decoding process into these segments, the system can apply different strategies to different parts of the data - standard decoding for most bits and erasure-based correction only for identified erroneous bits - thereby improving reliability without uniformly increasing complexity across the entire system.
2Reliability
If more error correction capability is implemented, then data recovery improves, but processing time increases
Solution Approach 1:
The patent applies partial action by performing error correction only on the specific bits that are identified as erroneous, rather than applying comprehensive error correction to all bits in the codeword. The system uses a first lightweight decoding attempt to identify only the necessary bits that require erasure replacement, then applies erasure-based correction only to those specific positions. This selective approach provides sufficient error correction capability for the actual errors present while avoiding the excessive processing time that would result from applying full error correction to all bits.
3Reliability
If erasure replacement is performed, then error correction capability exceeds original code capability, but additional processing steps are required
Solution Approach 1:
The patent uses preliminary action to perform error detection and bit identification before the erasure replacement step. By using a first decoding attempt to identify which bits are erroneous, the system prepares the necessary information (error locations) before applying the erasure replacement. This preliminary preparation allows the subsequent erasure-based decoding to work more efficiently, as the decoder already knows which positions require correction, reducing the overall processing complexity despite adding the erasure replacement step.
Solution Approach 2:
The patent introduces an intermediary step between standard decoding and final error correction. The first decoding attempt acts as an intermediary that identifies error locations without fully correcting them, and these identified positions then serve as input for the erasure replacement process. This intermediary step bridges the gap between simple error detection and comprehensive error correction, allowing the system to achieve enhanced error correction capability while managing processing complexity through structured intermediate processing.
Data Source
AI summary
Data is processed by selecting one or more bits in a codeword to replace with an erasure. The selected bits in the codeword are replaced with the erasure and error correction decoding is performed on the codeword with the erasure in place for the selected bits.