NAND Flash Memory Fixed Charge Layer Short Channel Effects
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Solution Overview
Problem
NAND flash memory arrays face 'short channel effects' when scaled to small dimensions, leading to increased source/drain resistance and variability in effective gate length, which existing technologies struggle to mitigate effectively.
Innovation Solution
The implementation of a fixed charge layer over the substrate surface, which forms conductive source/drain regions and reduces the need for dopant implantation, thereby addressing short channel effects by enhancing conductivity and threshold voltage control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If NAND flash memory arrays are scaled to small dimensions, then device density and integration are improved, but short channel effects increase leading to increased source/drain resistance and variability in effective gate length
Solution Approach 1:
A fixed charge layer is formed in the substrate prior to forming the floating gates and source/drain regions. This preliminary action of introducing fixed positive charge compensates for negative fixed charge at the silicon-silicon oxide interface, thereby reducing short channel effects and source/drain resistance before the device structure is completed.
Solution Approach 2:
The invention changes the electrical parameter of the substrate by introducing a fixed charge layer with specific charge density. This parameter change compensates for interface charges and modifies the electric field distribution in the channel, reducing variability in effective gate length and source/drain resistance.
2Reliability
If conventional dopant implantation is used to form source/drain regions, then conductivity is improved, but the process complexity and number of manufacturing steps increase
Solution Approach 1:
The invention extracts the need for separate dopant implantation steps by using a fixed charge layer to directly form conductive source/drain regions. The fixed charge layer itself provides the necessary conductivity, eliminating the need for additional dopant introduction processes.
Solution Approach 2:
The fixed charge layer serves multiple functions simultaneously: it compensates for interface charges, forms conductive source/drain regions, and reduces short channel effects. This self-service approach eliminates the need for separate dopant implantation steps that would otherwise be required to achieve similar conductivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of a fixed charge layer improves conductivity and reduces resistance in source/drain regions, mitigating short channel effects and eliminating the need for separate source/drain implants, resulting in more reliable and efficient NAND flash memory operations.
Implementation Method 1
forming a fixed charge layer that extends over a surface of a substrate... the fixed charge layer improves conductivity and reduces resistance in source/drain regions
Implementation Method 2
performing a plasma nitridation process on the dielectric layer... forming a fixed charge layer that extends over a surface of a substrate
Data Source
AI summary
A string of nonvolatile memory cells connected in series includes fixed charges located between floating gates and the underlying substrate surface. Such a fixed charge affects distribution of charge carriers in an underlying portion of the substrate and thus affects threshold voltage of a device. A fixed charge layer may extend over source/drain regions also.