NAND Flash Programming Method Using Isolation Cells for Channel Potential Boosting
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Solution Overview
Problem
As dimension scaling down in multi-level cell (MLC) NAND flash memory, the boosting ratio degrades due to large parasitic capacitance, leading to weak boosting conditions and program disturbance, which conventional methods struggle to address without compromising performance.
Innovation Solution
A programming method that involves setting isolation cells between side and pass cells in an inhibited memory string, applying a pre-boosting voltage to side cells, and then turning on isolation cells to transport this voltage to pass and primary cells, followed by a boosting voltage to the pass cells, effectively increasing the channel potential and reducing program disturbance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional local self-boosting method is used to prevent program disturbance, then channel potential of inhibited string is boosted, but boosting ratio degrades due to large parasitic capacitance when dimension scaling down
Solution Approach 1:
The memory string is segmented into distinct regions: inhibited string, side strings, and pass strings. Isolation cells are introduced to create electrical separation between these regions. The isolation cells can be selectively turned on or off to control the distribution of boosting voltage, thereby segmenting the harmful parasitic capacitance effect and applying boosting only where needed, resolving the contradiction between preventing program disturbance and avoiding parasitic capacitance degradation.
Solution Approach 2:
Instead of applying boosting voltage uniformly across the entire memory array, the patent applies boosting voltage locally only to specific regions (inhibited strings and adjacent side strings) while leaving other regions unaffected. This local quality approach ensures that the boosting effect is concentrated where needed to prevent program disturbance, while minimizing the overall parasitic capacitance impact on the system.
2Reliability
If boosting voltage is applied to prevent program disturbance, then channel potential increases, but program performance deteriorates due to additional operation complexity
Solution Approach 1:
The isolation cells are pre-configured and pre-charged during the programming operation setup phase. The boosting voltage is applied in advance to the isolation cells before the actual programming of the inhibited string begins. This preliminary action ensures that when the isolation cells are activated, they immediately provide the necessary voltage isolation and boosting effect, protecting the inhibited cells without adding significant time to the overall programming process.
Solution Approach 2:
Isolation cells serve as intermediary elements between the pass strings and inhibited strings. These intermediary cells absorb and redirect the boosting voltage, preventing direct interference with the inhibited string while still providing the necessary electrical isolation. The intermediary isolation cells enable the boosting operation to proceed without directly impacting the program performance of the target inhibited cells.
3Reliability
If isolation cells are used to transport pre-boosting voltage, then channel potential is enhanced, but device complexity increases
Solution Approach 1:
The isolation cells perform multiple functions: they act as voltage isolation barriers, serve as voltage transport channels for pre-boosting voltage, and provide electrical separation between different memory string regions. By making these cells multi-functional, the patent avoids adding dedicated structures for each function, thereby limiting the increase in device complexity while achieving reliable channel potential enhancement.
Solution Approach 2:
The isolation cells utilize the existing voltage distribution in the memory array to charge themselves during normal operation. When pass strings are programmed, the boosting voltage naturally appears on adjacent isolation cells due to capacitive coupling. The isolation cells then use this self-acquired voltage to provide isolation and boosting effects without requiring external voltage sources or complex control circuitry, thereby maintaining device simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the channel potential of inhibited memory strings, reducing program disturbance and ensuring proper inhibition without performance loss, by pre-boosting and further boosting the voltage in the memory cells.
Implementation Method 1
turning on the at least one first isolation cell at a second time point for transporting the pre-boosting voltage to pre-boosting channels of the at least one first pass cell and a primary cell
Implementation Method 2
providing a boosting voltage to word lines of the at least one first pass cell during a boosting time period... a channel potential of the inhibited cell should be high enough to reduce electrical field across the tunnel oxide
Implementation Method 3
a channel potential of the inhibited cell should be high enough to reduce electrical field across the tunnel oxide to avoid Fowler-Nordheim (FN) tunneling
Data Source
AI summary
A non-volatile memory and a programming method thereof are provided. The programming method for the non-volatile memory includes: setting at least one first isolation cell between a first side cell and at least one first pass cell of an inhibited memory string; cutting off the at least one first isolation cell and providing a pre-boosting voltage to a word line of the first side cell and at a first time point; turning on the at least one first isolation cell at a second time point for transporting the pre-boosting potential to channels of the at least one first pass cell and a primary cell at a second time period; and providing a boosting voltage to word lines of the at least one first pass cell during a boosting time period.