NAND Flash Multi-Pass Programming for IVS Retention Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
NAND flash memory cells experience retention errors due to instant threshold voltage shift (IVS), leading to data instability, especially in multi-level cells, as the threshold voltage drops significantly after programming, reducing the read margin and causing data invalidation.
Innovation Solution
Implement a multi-pass programming scheme with additional programming operations or increased verification voltages for memory cells that have recently exceeded verification thresholds, particularly for higher programming states, to mitigate IVS and ensure stable threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single-pass programming scheme is used, then programming speed is improved, but threshold voltage stability deteriorates due to IVS
Solution Approach 1:
The programming operation is divided into multiple passes: a first program pass that programs memory cells to target states, and a second program pass that applies additional programming pulses to cells exhibiting IVS to restore their threshold voltages. This segmentation allows the system to address both speed (through efficient first-pass programming) and stability (through targeted second-pass correction).
Solution Approach 2:
The patent performs a preliminary identification of memory cells exhibiting IVS between the first and second program passes, then applies corrective programming pulses specifically to those cells. This preliminary action approach ensures that only affected cells receive additional programming, maintaining overall programming efficiency while correcting stability issues.
2Reliability
If additional programming operations are performed to mitigate IVS, then threshold voltage stability is improved, but programming time increases
Solution Approach 1:
The patent applies different programming strategies to different memory cells based on their individual IVS characteristics. Cells exhibiting significant IVS receive additional programming pulses in the second pass, while cells without IVS problems complete programming in the first pass. This localized approach ensures stability correction only where needed, minimizing overall programming time extension.
Solution Approach 2:
The patent applies excessive programming action (additional programming pulses beyond what would normally be needed) specifically to cells exhibiting IVS. This partial excessive action ensures that these problematic cells achieve sufficient threshold voltage stability, while other cells complete programming with standard pulse sequences, balancing correction effectiveness with time efficiency.
Data Source
AI summary
In certain aspects, a memory device includes a plurality of memory cells and a control circuit coupled to the plurality of memory cells. The plurality of memory cells includes a first set of memory cells configured to be programmed into a first set of programming states each of which is not lower than a first predetermined programming state. The control circuit is configured to perform a first program pass on the first set of memory cells. The control circuit is configured to continue to program at least a first memory cell from the first set of memory cells with one or more first programming voltages. A threshold voltage of the first memory cell is greater than a first verification voltage that corresponds to a first programming state of the first memory cell. The control circuit is configured to perform a second program pass on the first set of memory cells.