NAND Flash LLR Auto-Learning Through Background Threshold Reads

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Solution Overview

Problem

Current error correction methods for NAND flash memory devices require expensive and time-consuming lab testing to generate Log Likelihood Ratio (LLR) values, which are used to determine Bit Error Rate (BER), and these values change over the lifetime of the device, necessitating frequent updates and significant storage space.

Innovation Solution

A method and apparatus that perform background reads at varying threshold voltages to identify and update LLR values dynamically, eliminating the need for lab testing and reducing storage requirements by calculating LLR values on the actual NAND device during operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If lab testing is performed to identify LLR values, then accuracy of BER indication is improved, but cost and time consumption increase

Engineering Contradiction:
Improveaccuracy of BER indicationVSAvoidtime consumption
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The memory device performs self-characterization by automatically generating and updating LLR values through background reads during normal operation, eliminating the need for external lab testing. The device monitors its own error characteristics and adapts its decoding parameters autonomously throughout its lifetime.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

LLR values are pre-calculated and stored in lookup tables during manufacturing, providing immediate error correction capability. These values are then continuously updated in the background during normal operation to maintain accuracy without requiring periodic lab testing.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If LLR tables are stored for different device ages, then accuracy of error correction is improved, but storage space requirements increase

Engineering Contradiction:
Improveaccuracy of error correctionVSAvoidstorage space
Core Design Contradiction:
ReliabilityVSVolume of stationary object

Solution Approach 1:

Instead of storing multiple static LLR tables for different device ages, the system dynamically updates LLR values in the background during normal operation. The LLR lookup tables are continuously adapted to reflect current device characteristics, providing accurate error correction for the current device state without requiring extensive storage for historical tables.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameters of LLR values over time through continuous background updates. By monitoring actual read errors and adjusting LLR parameters accordingly, the system maintains optimal error correction performance as the device ages, replacing the need to store multiple fixed parameter sets.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If background reads are performed at multiple threshold voltages, then accuracy of LLR identification is improved, but processing complexity increases

Engineering Contradiction:
Improveaccuracy of LLR identificationVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system combines multiple background reads at different threshold voltages into a unified LLR calculation process. By merging the results from reads at various threshold levels, the system accurately identifies LLR values while managing processing complexity through integrated computation and lookup table structures.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10291263B2Auto-learning log likelihood ratio
Publication Date: 2019.05.14 IP GEM GRP LLC
  • US10291263B2 patent drawing
  • US10291263B2 patent drawing
  • US10291263B2 patent drawing

AI summary

A method for identifying log likelihood ratio (LLR) values includes programming codewords into nonvolatile memory devices in response to receiving host-requested write instructions and performing background reads of the programmed codewords in a block at a default threshold voltage, at one or more threshold voltage offset that is less than the default threshold voltage and at one or more threshold voltage offset that is greater than the default threshold voltage. One of the background reads is decoded to identify the stored codeword(s) and a set of LLR values is identified using the stored read results and the identified codeword(s). The process of performing background reads, storing, decoding and identifying is repeated to identify a set of LLR values for each block and further to identify updated sets of LLR values. Host-requested reads are performed and are decoded using LLR values from the updated set of LLR values corresponding to the block that was read.