NAND Flash Read Recovery Using Adaptive Asymmetric LLR Retry
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Solution Overview
Problem
NAND Flash memory devices often experience decoding failures due to improper read reference threshold voltages, leading to inefficient read retry processes, as existing techniques assume optimal hard and soft threshold placements, which may not account for asymmetrical error patterns.
Innovation Solution
The method involves adaptively generating log-likelihood ratio (LLR) entries using techniques such as linear regression or neural networks, based on performance statistics like syndrome weights and flip errors, to perform deep retry operations, allowing for asymmetric LLR values that better match the error profiles in NAND Flash memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional hard threshold read retry is used, then device complexity is reduced, but decoding performance deteriorates due to inability to handle asymmetrical error patterns
Solution Approach 1:
The patent applies asymmetry by generating LLR values with different symmetry characteristics (symmetric and asymmetric LLR distributions) to match the asymmetrical error patterns in NAND Flash memory. This allows the decoder to adapt to biased error patterns where certain bit transitions occur more frequently than others, thereby improving decoding performance without significantly increasing device complexity.
Solution Approach 2:
The patent implements dynamics by adaptively generating LLR values based on observed error patterns and syndrome weights from failed decoding attempts. The system dynamically adjusts the LLR distribution and symmetry based on real-time feedback from the decoding process, enabling it to adapt to changing error conditions rather than using fixed threshold values.
2Adaptability or versatility
If fixed LLR values are used in deep retry, then processing speed is improved, but adaptability to different error patterns deteriorates
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing multiple LLR value sets with different symmetry characteristics in lookup tables before actual decoding operations. When a decoding failure occurs, the system can quickly retrieve and apply appropriate pre-computed LLR values based on the observed error pattern, avoiding the need for complex real-time calculations while maintaining adaptability.
Solution Approach 2:
The patent implements parameter changes by varying the LLR value parameters (mean, variance, symmetry) based on the specific error pattern detected during decoding failures. The system changes these parameters adaptively to match the observed error characteristics, allowing it to handle diverse error patterns effectively while maintaining efficient processing through parameterized LLR generation.
3Reliability
If multiple read retry attempts are performed, then decoding success rate is improved, but read time increases due to repeated failed attempts
Solution Approach 1:
The patent applies feedback by using syndrome weights and error pattern information from failed decoding attempts to inform subsequent LLR generation. The system analyzes the feedback from each failed retry attempt and uses this information to generate more appropriate LLR values for the next attempt, creating a closed-loop system that learns from failures and improves subsequent decoding attempts.
Solution Approach 2:
The patent implements preliminary action by performing adaptive LLR generation and deep retry operations before exhausting all traditional hard threshold retry attempts. This allows the system to address difficult-to-decode data early in the process using more sophisticated methods, potentially avoiding the need for numerous repeated hard threshold retry attempts and reducing overall read time.
Data Source
AI summary
A method of reading data read from a NAND Flash memory device includes decoding a set of data read from the device, using an initial set of hard bit thresholds, when the decoding is unsuccessful, performing a read-retry operation that retries the decoding using, in order, each of a plurality of entries in a read-retry table of hard bit thresholds, stopping when decoding based on one of the entries is successful, and when the read-retry operation is unsuccessful, performing a deep retry operation using a set of log-likelihood ratios (LLRs) that vary in at least one of values or symmetries. NAND Flash memory apparatus includes a Flash media controller, a data bus, and an adaptive LLR engine configured to generate, for use in a deep retry operation, a set of LLRs that, and to transfer the set of LLRs that vary to the media controller via the bus.