NAND Flash Memory Data Restoration via LSB Combination Signal

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Solution Overview

Problem

Storage errors, such as abnormal stops during data storage in NAND flash memory devices, can lead to the loss of previously stored data, particularly when storing most significant bit (MSB) data, causing the loss of associated least significant bit (LSB) data due to incomplete threshold voltage changes in memory cells.

Innovation Solution

A semiconductor device with a memory controller and memory device configuration that includes a data combination circuit to generate a data combination signal by combining sets of LSB data, allowing for the restoration of LSB data from a reserved memory block when storage errors occur during MSB data storage, and storing this signal alongside MSB data in separate memory blocks to ensure data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If MSB data is stored in a memory cell after LSB data is stored, then storage capacity is increased, but previously stored LSB data may get lost due to storage error during MSB storage

Engineering Contradiction:
Improvestorage capacityVSAvoiddata integrity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by storing a backup of LSB data in a register before proceeding to store MSB data in the memory cell. This preparatory step ensures that if an abnormal stop occurs during MSB storage, the LSB data can be recovered from the register, preventing data loss and maintaining data integrity while preserving the ability to store both LSB and MSB data for increased storage capacity.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If threshold voltage of memory cell is changed to program level according to stored LSB data, then data is stored, but threshold voltage may increase only up to indefinite level different from target level when storage error occurs

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidprogram operation reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent implements feedback by continuously monitoring the program operation status and detecting abnormal stops during MSB data storage. When a storage error is detected, the system responds by recovering LSB data from the register and restoring it to the memory cell, thereby correcting the threshold voltage deviation and ensuring reliable program operation while maintaining precise threshold voltage control.

Inventive Principle:
Principle #23Feedback

3Reliability

If data combination circuit combines plural sets of LSB data to generate data combination signal, then data restoration capability is improved, but device complexity increases

Engineering Contradiction:
Improvedata restoration capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the data storage system into distinct functional components: a register for backup LSB data, a data combination circuit for generating combination signals, and separate storage areas for LSB and MSB data. This modular segmentation enables the data combination circuit to systematically combine plural sets of LSB data to generate restoration signals, improving data restoration capability while managing circuit complexity through organized functional separation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9025379B2Semiconductor device and method of operating the same
Publication Date: 2015.05.05 SK HYNIX INC
  • US9025379B2 patent drawing
  • US9025379B2 patent drawing
  • US9025379B2 patent drawing

AI summary

A method of operating a semiconductor device includes storing LSB data in a LSB page included in plural pages of corresponding word line group of a first memory block, generating a data combination signal by combining plural sets of LSB data after the step of storing LSB data, storing the data combination signal in a second memory block, and storing MSB data in a MSB page included in the plural pages.