NAND Flash Memory Page Buffers for Efficient Data Variation Testing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current NAND flash memory devices require lengthy operations to measure data variation due to the need for multiple read operations and XOR logic circuits, which increases processing time and resource utilization.
Innovation Solution
A nonvolatile memory device with page buffers and a control circuit that performs XOR operations on data read using different voltage conditions, allowing for efficient comparison and output of test data to external devices, reducing the need for separate buffers and logic circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple read operations and XOR logic circuits are used to measure data variation, then measurement precision is improved, but processing time increases
Solution Approach 1:
The patent combines multiple page buffers and XOR logic circuits into a single integrated structure within the memory device. The plurality of page buffers store data from multiple read operations simultaneously, and the integrated XOR circuit performs bit-wise comparison operations on this data, eliminating the need for sequential external processing and reducing overall measurement time while maintaining precision.
Solution Approach 2:
The patent performs preliminary data preparation by storing multiple pages of data in the plurality of page buffers before the actual XOR comparison operation. This preliminary storage of data under different read voltage conditions allows the subsequent measurement operation to be executed faster, as the data is already positioned and ready for comparison within the integrated circuit.
2Measurement precision
If multiple buffers and XOR logic circuits are provided externally, then measurement capability is improved, but device complexity increases
Solution Approach 1:
The patent merges the functionality of multiple separate page buffers and XOR logic circuits into a single integrated memory device structure. The plurality of page buffers are integrated within the memory device along with the XOR logic circuit, reducing the number of discrete external components and simplifying the overall system architecture while maintaining the capability to perform precise data variation measurements.
3Measurement precision
If data is read multiple times with different voltage conditions, then measurement accuracy is improved, but resource utilization increases
Solution Approach 1:
The patent performs preliminary reading of data multiple times under different read voltage conditions and stores these data pages in the plurality of page buffers within the memory device. By performing this preliminary data collection internally and maintaining it in integrated buffers, the system prepares measurement data efficiently, allowing accurate threshold voltage distribution measurement while managing energy consumption through integrated rather than external processing resources.
Data Source
AI summary
A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.