NAND Flash Memory Programming Method for Multi-Level Cell Offset Control
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Solution Overview
Problem
NAND flash memory programming methods face challenges in minimizing threshold voltage offsets due to coupling effects between adjacent cells, which affect storage density and reliability.
Innovation Solution
A memory programming method that performs two distinct programming operations with flag bits to set and reset threshold voltage ranges for multi-level cells, reducing interference and offset by adjusting voltage ranges for each bit of a two-bit data stored across different pages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cell programming is performed to increase storage density, then storage capacity is improved, but threshold voltage offset increases due to coupling effects between adjacent cells
Solution Approach 1:
The patent divides the programming operation into two separate sequential steps: first programming the lower page (LSB), then programming the upper page (MSB). This segmentation allows the system to handle interference from adjacent cells in a controlled manner, reducing threshold voltage offset while maintaining multi-level storage density.
Solution Approach 2:
The patent performs preliminary programming of the lower page before programming the upper page. By establishing the lower page data first, the system creates a known state that reduces unpredictable interference during upper page programming, thereby minimizing threshold voltage offset and improving precision.
2Reliability
If threshold voltage range is increased to accommodate offset variations, then reliability is maintained, but storage density decreases
Solution Approach 1:
The patent performs preliminary programming of the lower page before programming the upper page. By establishing the lower page data first, the system creates a known state that reduces unpredictable interference during upper page programming, thereby minimizing threshold voltage offset and improving precision.
Solution Approach 2:
The patent dynamically adjusts programming parameters (voltage levels, pulse widths) based on the detected threshold voltage offset from the first programming operation. This adaptive parameter adjustment ensures that the second programming operation compensates for accumulated offset, maintaining reliable data storage within optimized voltage ranges.
Data Source
AI summary
A memory programming method is provided. A first programming operation is performed to program a multi level cell from an initial state to a first target state, which corresponds to a storage data and has a first threshold voltage range. A flag bit of the NAND flash is set to a first state to indicate that the first programming operation has been performed. A second programming operation is performed to program the multi level cell from the first target state to a second target state, which corresponds to the storage data and has a second threshold voltage range. The flag bit is set to a second state to indicate that the second programming operation has been performed.