NAND Flash Memory Writing Order for Data Integrity
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Solution Overview
Problem
Current memory systems using NAND flash memory face challenges in efficiently writing data across multiple pages to ensure data restoration in case of burst errors, particularly when data is lost across adjacent word lines in four planes, which complicates the writing process and increases redundant data, reducing storage capacity.
Innovation Solution
The memory system employs a method where code words are generated and written across multiple pages in a specific order, ensuring that symbols from the same code word are distributed across different pages to maintain data integrity, even if data is lost across adjacent word lines, without increasing the redundant data ratio, by using a writing order that avoids interference between adjacent cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If inter-page ECC is used to distribute code words across multiple pages for error recovery, then data restoration capability is improved, but writing process complexity and redundant data ratio increase
Solution Approach 1:
The code word is segmented into multiple symbols that are distributed across different pages. Specifically, one code word is divided and written to multiple pages (e.g., Page 0, Page 1, Page 2) in a segmented manner, ensuring that even if one page is lost, the code word can be reconstructed from the remaining segments. This segmentation approach improves data restoration capability while managing writing complexity through systematic distribution.
Solution Approach 2:
The patent extends the error protection mechanism from a single plane to multiple planes (Plane 0, Plane 1, Plane 2, Plane 3) in a 3D NAND structure. By distributing code words across different planes and word lines, the system creates a multi-dimensional redundancy structure. This allows data restoration even when entire word lines or planes are affected, transforming the error protection from 2D to 3D space without proportionally increasing redundant data ratio.
2Reliability
If redundant data is increased to protect against burst errors, then data integrity is improved, but storage capacity is reduced
Solution Approach 1:
The patent applies partial redundancy by distributing only critical portions of code words across multiple pages and planes, rather than duplicating entire code words. Each page contains a segment of the code word, and the combination of segments from multiple pages provides the necessary redundancy. This partial redundancy approach maintains data integrity while minimizing the overhead compared to full duplication, thereby preserving storage capacity.
Solution Approach 2:
The patent merges multiple code words and their segments across different pages and planes into a unified error protection structure. By combining the distributed segments from multiple locations, the system achieves robust error protection without requiring separate redundant copies for each page. This merging approach optimizes the balance between data integrity and storage capacity utilization.
Data Source
AI summary
According to one embodiment, a memory system includes a non-volatile memory, a memory interface, an encoder configured to generate eight code words, and a writing control unit. The writing control unit causes the memory interface to perform a first writing and a second writing, and repeat the first writing and the second writing. The first writing writes a first symbol included in a first code word to a second page in a first word line. The second writing writes a second symbol included in a first code word to a first page in a third word line adjacent to a second word line adjacent to a first word line. Thus, the code words to be written are changed. The repeat of the first writing and the second writing is performed by shifting a word line at a write destination one by one.