NAND Flash Error Correction Using ML-Generated Codewords

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Solution Overview

Problem

Modern NAND flash memory devices face challenges in accurately correcting bit errors due to inter-wordline interference, intra-wordline interference, retention noise, and process, voltage, or temperature changes, which existing error correction codes (ECC) struggle to address effectively.

Innovation Solution

A memory system that incorporates a machine learning algorithm, where a processor applies read outputs and related features from neighboring memory cells to generate a second codeword, enabling a secondary ECC operation to correct errors when the initial ECC fails, leveraging a neural network to improve error detection and correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional error correction codes (ECC) are used to correct bit errors in NAND flash memory, then the error correction capability is limited, but the system complexity remains low

Engineering Contradiction:
Improveerror correction capabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A machine learning processor is introduced as an intermediary component between the memory device and the traditional ECC system. This processor applies machine learning algorithms to analyze read outputs and generate corrected codewords, thereby enhancing error correction capability beyond what traditional ECC can achieve while maintaining a relatively simple overall system architecture

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The error correction process is segmented into two stages: first, traditional ECC operations are performed on the initial codeword; when this fails, the system then activates the machine learning processor to perform secondary error correction on selected memory cells, dividing the correction task between simple and complex processing modes

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If machine learning algorithms are applied to enhance error correction, then the error detection and correction accuracy is improved, but the processing time and computational complexity increase

Engineering Contradiction:
Improveerror detection accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The machine learning processor does not operate on all memory cells but only on selected cells where traditional ECC failed. This partial application of the complex machine learning algorithm reduces processing time while maintaining high error detection accuracy for the cells that need it most

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system first performs traditional ECC operations as a preliminary step before activating the machine learning processor. This preliminary action filters out cases that don't need complex processing, reducing overall processing time while maintaining high accuracy for difficult error cases

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20220013189A1Error detection and correction using machine learning
Publication Date: 2022.01.13 SAMSUNG ELECTRONICS CO LTD
  • US20220013189A1 patent drawing
  • US20220013189A1 patent drawing
  • US20220013189A1 patent drawing

AI summary

A memory system including a memory device and a memory controller including a processor. The memory controller is configured to read outputs from the memory cells in response to a read command from a host and to convert the read outputs to a first codeword. The processor performs a first error correcting code (ECC) operation on the first codeword. The processor is further configured to apply, for each selected memory cell among the memory cells, a corresponding one of the read outputs and at least one related feature as input features to a machine learning algorithm to generate a second codeword, and the memory controller is configured to perform a second ECC operation on the second codeword, when the first ECC operation fails.