Page Buffer Circuit for NAND Flash Memory

Solution Overview

Problem

Existing page buffers in NAND flash memories are inefficient due to the complex control of multiple transistors for data transfer and reset, leading to area wastage and increased power consumption, particularly when performing operations like COPY-BACK PROGRAM and CACHE PROGRAM.

Innovation Solution

A page buffer design with symmetrical read/write units, each including a pair of latches and a reduced number of transistors for data loading and outputting, using a single transistor for latch reset and employing a single control signal for programming, thereby simplifying control and reducing area occupation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple transistors are used for data transfer and reset control in page buffer, then data transfer capability is improved, but area occupation and power consumption increase

Engineering Contradiction:

Improvedata transfer capabilityVSAvoidarea occupation

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The patent combines multiple control functions into a single transistor by using its gate terminal to receive different control signals at different times. The same transistor performs both data transfer control and latch reset functions through time-multiplexed control signals, thereby reducing the number of transistors and occupied area while maintaining full functionality.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The control terminal of the transistor is designed to be universal, accepting different control signals for different operations. A single transistor serves multiple purposes: controlling data loading into latches, controlling data output from latches, and resetting latch states, depending on which control signal is applied to its gate terminal.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Productivity

If multiple transistors are used for data transfer and reset control in page buffer, then data transfer capability is improved, but power consumption increases

Engineering Contradiction:

Improvedata transfer capabilityVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent combines multiple control functions into a single transistor by using its gate terminal to receive different control signals at different times. The same transistor performs both data transfer control and latch reset functions through time-multiplexed control signals, thereby reducing the number of transistors and occupied area while maintaining full functionality.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The control terminal of the transistor is designed to be universal, accepting different control signals for different operations. A single transistor serves multiple purposes: controlling data loading into latches, controlling data output from latches, and resetting latch states, depending on which control signal is applied to its gate terminal.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If complex control signals are used for multiple transistor operations, then operational flexibility is improved, but control complexity increases

Engineering Contradiction:

Improveoperational flexibilityVSAvoidcontrol complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple control functions into a single transistor by using its gate terminal to receive different control signals at different times. The same transistor performs both data transfer control and latch reset functions through time-multiplexed control signals, thereby reducing the number of transistors and occupied area while maintaining full functionality.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The transistor's function is made dynamic rather than static. The same physical transistor changes its operational role based on the control signal applied to its gate terminal. This dynamic reconfiguration allows a single transistor to perform multiple functions that would traditionally require separate dedicated transistors for each function.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS7567456B2Page buffer circuit and method for a programmable memory device

Publication Date: 2009.07.28 MICRON TECHNOLOGY INC

AI summary

A page buffer for an electrically programmable memory includes a plurality of storage units, each comprising a first latch and a second latch. Input switching means loads into the latch the data bit to be written and to be temporarily stored. The input switching means has an input terminal connected to the respective data line for receiving a set voltage provided therethrough. The input switching means provides the set voltage to the first or second input/output terminals of the latch depending on the data bit to be written. An output switch device transfers onto the respective data line the read data bit temporarily stored into the latch and has a first terminal coupled to one among the first and second input/output terminals of the latch, a second terminal connected to the respective data line and a control terminal receiving the output control signal.