NAND Flash Page-Level Read Disturb Mitigation
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Solution Overview
Problem
Existing NAND FLASH memory devices suffer from Read Disturb errors due to elevated voltage stresses during read operations, which can lead to data corruption and are not effectively addressed by current error correction techniques, and moving data blocks to mitigate these errors degrades performance and shortens the device's lifespan.
Innovation Solution
Implementing a system controller that monitors the number of read operations on each block and moves data on a page-by-page basis to a different block when the read count reaches a threshold, updating the logical-to-physical translation table to prevent Read Disturb errors without incurring significant overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data blocks are moved to mitigate Read Disturb errors, then data reliability is improved, but system performance degrades and device lifespan shortens
Solution Approach 1:
The patent segments the data movement operation into page-level granularity instead of moving entire blocks. When Read Disturb errors are detected in specific pages, only those affected pages are relocated to new physical locations, while other pages remain in place. This segmentation dramatically reduces the amount of data movement required, thereby maintaining system performance while still protecting data reliability.
Solution Approach 2:
The patent implements preliminary monitoring of read operation counts on each block before errors occur. By tracking the number of read operations and comparing against predefined thresholds, the system proactively identifies blocks at risk of Read Disturb errors and relocates data before corruption happens. This preliminary action prevents errors rather than correcting them, improving reliability without the overhead of reactive error correction.
2Reliability
If data blocks are moved frequently to prevent Read Disturb errors, then data reliability is improved, but device lifespan shortens due to increased erase operations
Solution Approach 1:
The patent applies partial action by moving only the minimum necessary data pages that are actually at risk of Read Disturb errors, rather than moving entire blocks preemptively. The system monitors read counts and selectively relocates only those pages exceeding error thresholds, avoiding unnecessary data movement and associated erase operations. This partial approach extends device lifespan while maintaining sufficient data reliability.
3Reliability
If error correction techniques are used to address Read Disturb errors, then data reliability is improved, but the errors are not effectively corrected
Solution Approach 1:
The patent performs preliminary data relocation based on monitored read operation counts before Read Disturb errors actually corrupt the data. By identifying blocks that have been read excessively and relocating their contents proactively, the system prevents errors from occurring in the first place, making error correction techniques unnecessary and ensuring data integrity without information loss.
Data Source
AI summary
Methods and apparatuses for reduction of Read Disturb errors in a NAND FLASH memory system comprise a controller configured to organize FLASH memory devices into blocks, each block having a plurality of pages, and each page defining an individually addressable physical memory location. The controller is further configured to accumulate a Block READ Count corresponding to the number of times any pages in a first block of pages have been read since the first block was last erased. Once the READ count reaches a predetermined number, the controller responds to subsequent READ requests for pages within the first block by moving data associated with a requested page to a page in a second, different block without moving data associated with other pages in the first block, and modifying a logical-to-physical translation table to associate the moved data with the physical address of the page in the second block.