NAND Flash Power Budgeting With Peak Current Priority Control

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Solution Overview

Problem

Managing power consumption in NAND flash memory systems becomes challenging when multiple memory devices operate concurrently, as peak current demands exceed the total current budget, potentially leading to power exceeding specifications and impacting quality of service.

Innovation Solution

Implementing predictive peak current monitoring and priority levels in power management, where each die in a multi-die package broadcasts its expected peak current magnitude and priority, allowing informed decisions on whether to pause or proceed with operations, potentially switching to a low-peak-current operating mode to stay within the current budget.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple memory devices operate concurrently, then productivity and data throughput are improved, but power consumption and peak current demand exceed specifications

Engineering Contradiction:
Improvedata throughputVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary monitoring of peak current demands before operations are executed. The memory controller receives current demand information from multiple memory devices in advance, determines whether the total current budget is sufficient, and only then initiates the operations. This prevents exceeding power specifications while maintaining high productivity through concurrent operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where memory devices broadcast their expected peak current magnitude and priority levels to the memory controller. The controller uses this feedback information to make informed decisions about operation scheduling, dynamically adjusting which operations proceed based on available current budget and device priorities.

Inventive Principle:
Principle #23Feedback

2Productivity

If multiple memory devices operate concurrently, then data throughput is improved, but quality of service is negatively impacted

Engineering Contradiction:
Improvedata throughputVSAvoidquality of service
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system assigns different priority levels to different memory devices based on their specific quality of service requirements. High-priority devices receive preferential treatment in operation scheduling, ensuring their quality of service is maintained even when multiple devices operate concurrently. This allows the system to maximize throughput while protecting critical operations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system performs preliminary determination of whether to initiate operations based on current budget constraints before actual data transfer begins. This advance decision-making prevents situations where quality of service would be degraded due to power limitations, ensuring reliable operation while maintaining high throughput.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If peak current monitoring and priority levels are implemented, then power consumption is managed effectively, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcontrol mechanism complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The memory controller performs multiple functions using a unified approach: it monitors peak current demands, determines operation scheduling, manages power budget allocation, and handles priority-based scheduling all through the same control logic. This multi-functionality reduces overall system complexity despite the sophisticated power management requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system manages complexity by changing operational parameters (operation initiation, suspension, or cancellation) based on current budget conditions rather than redesigning the entire control architecture. The memory controller adjusts which operations proceed by modifying simple binary decisions (proceed/delay) based on monitored current parameters.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11907547B2Power management
Publication Date: 2024.02.20 MICRON TECHNOLOGY INC
  • US11907547B2 patent drawing
  • US11907547B2 patent drawing
  • US11907547B2 patent drawing

AI summary

Memory device might include a controller configured to cause the memory device to determine whether the memory device is waiting to initiate a next phase of an access operation, and in response to determining that the memory device is waiting to initiate the next phase, determine whether there is sufficient available current budget to initiate the next phase in a selected operating mode in response to at least the priority token of the memory device, an expected peak current magnitude for the next phase in the selected operating mode, and additional expected peak current magnitudes for other memory devices. In response to determining that there is sufficient available current budget to initiate the next phase in the selected operating mode, the memory device might output the expected peak current magnitude for the next phase in the selected operating mode from the memory device.