NAND Flash Memory Pass Disturbance Control via Pre-Bias Voltage Segmentation
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Solution Overview
Problem
NAND flash memory devices face challenges in preventing threshold voltage changes in program inhibition cells due to the pass disturbance phenomenon, which can lead to undesired programming of program target cells during the application of pass voltage.
Innovation Solution
A method involving the application of pre-bias voltages during the programming process, where a first pre-bias voltage greater than the standby voltage is applied to programmed memory cells, and a second pre-bias voltage smaller than the standby voltage is applied to program target cells, along with specific voltage applications to different groups of memory cells to manage channel potentials and prevent threshold voltage changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-level pass voltage is applied to prevent pass disturbance phenomenon, then program inhibition cells are protected from threshold voltage changes, but program target cells may experience undesired threshold voltage shifts
Solution Approach 1:
The patent segments the memory cell string into three distinct groups based on their programming status: program target cells, programmed memory cells, and erase-state memory cells. Each group receives a different voltage level during the pass voltage application period, allowing differential control that prevents pass disturbance in inhibition cells while protecting program target cells from undesired threshold voltage shifts.
Solution Approach 2:
Different voltage levels are applied to different local regions (groups) of memory cells within the same memory cell string. Program inhibition cells receive a first pass voltage level, program target cells receive a second pass voltage level, and programmed memory cells receive a third pass voltage level. This localized voltage differentiation enables precise control over threshold voltage changes in each region.
2Reliability
If a pass voltage is applied to word lines before program voltage to prevent pass disturbance, then program inhibition cells are protected, but program target cells may have their threshold voltages undesirably moved
Solution Approach 1:
The patent applies pass voltages to word lines during a preliminary period before the program voltage is applied to the program target cell. This preliminary action prepares the channel potentials of program inhibition cells to prevent pass disturbance. By timing the voltage application sequence correctly and using different voltage levels for different cell groups, the patent achieves protection against pass disturbance while avoiding undesired threshold voltage shifts in program target cells.
Solution Approach 2:
The patent changes the voltage parameter applied to different word lines based on the programming status of the memory cells they control. Three distinct voltage levels are used: a first pass voltage for program inhibition cells, a second pass voltage for program target cells, and a third pass voltage for programmed memory cells. This parameter differentiation resolves the contradiction by allowing each cell group to experience appropriate voltage conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses the pass disturbance phenomenon, ensuring accurate programming of program target cells while maintaining the threshold voltages of program inhibition cells, thereby enhancing the reliability and precision of the programming process in semiconductor memory devices.
Implementation Method 1
NAND flash memory devices face challenges in preventing threshold voltage changes in program inhibition cells due to the pass disturbance phenomenon
Implementation Method 2
preventing threshold voltage changes in program inhibition cells
Data Source
AI summary
In a method of programming a semiconductor memory device, during a standby period, a standby voltage is applied to word lines coupled to a plurality of memory cells included in a selected memory cell string, and, during a first program period, a first pre-bias voltage is applied to a word line coupled to at least one of programmed memory cells of the selected memory cell string. The first pre-bias voltage is greater than the standby voltage.


