NAND Flash Memory Plane Precharging for Current Surge Management
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Solution Overview
Problem
Simultaneous access to multiple memory planes in NAND flash memory devices can cause large current surges, potentially damaging the power module due to increased current demands.
Innovation Solution
A driving method that involves precharging word lines and bit lines of multiple memory planes sequentially, with each plane reaching voltage thresholds before conducting data operations, thereby managing current surges and accelerating data transmission speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If multiple memory planes are accessed simultaneously to speed up data transmission, then data transmission speed is improved, but current surge increases and may harm the power module
Solution Approach 1:
The patent applies preliminary action by precharging the bit lines of the first memory plane before simultaneously accessing multiple memory planes. This precharging operation prepares the bit lines in advance, allowing the subsequent simultaneous access to multiple planes to proceed without causing excessive current surge, thus resolving the contradiction between speed improvement and current surge reduction
Data Source
AI summary
A driving method of a nonvolatile memory device including multiple memory planes includes following operations: precharging at least one word line and at least one bit line of a first memory plane; if the at least one word line and the at least one bit line of the first memory plane have been precharged for a first time length or to respective voltage thresholds, precharging at least one word line and at least one bit line of a second memory plane; conducting a first data operation to at least one memory cell of the first memory plane disposed at intersections of the at least one word line and the at least one bit line thereof; conducting a second data operation to at least one memory cell of the second memory plane disposed at intersections of the at least one word line and the at least one bit line thereof.