NAND Flash Memory Program Verification Using Redundant Block Backup

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

NAND flash memories face process variation and reliability challenges due to word line leakage, which can only be detected after a program-erase cycle, leading to potential writing errors and incomplete detection at the wafer end.

Innovation Solution

A memory device and program verification method that pre-reads previous page data, writes to a current page, and analyzes both sets of data to determine if backup to a redundant block is necessary, thereby detecting defects and reducing failure rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If word line leakage is detected at wafer end, then detection timing is early, but many defects are missed because they only appear after P/E cycle

Engineering Contradiction:
Improvedefect detection accuracyVSAvoidwriting error rate
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by performing read-verify operations during the programming process itself, before the P/E cycle completes. The controller reads the programmed data and verifies it immediately, detecting word line leakage defects in real-time during programming rather than waiting for subsequent erase cycles. This allows defects to be detected and corrected before they cause writing errors.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If read-verify operation is performed during programming, then defect detection is improved, but verification time increases

Engineering Contradiction:
Improvedefect detection accuracyVSAvoidverification time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent merges the read-verify operation with the programming operation itself. Instead of performing verification as a separate sequential step after programming, the controller integrates the read operation during the programming process, combining data writing and verification into a single operational cycle. This reduces the overall time penalty while maintaining thorough defect detection.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If all data is backed up to redundant block, then reliability is improved, but memory capacity is reduced

Engineering Contradiction:
Improvefailure rateVSAvoidusable memory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies local quality by selectively backing up only the specific data blocks that are determined to be defective or at risk during the programming process. Rather than backing up all data to redundant blocks, the controller identifies only the problematic areas through read-verify operations and targets those specific locations for backup. This maintains high reliability for critical data while preserving maximum usable capacity in the memory device.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10714197B1Memory device and program verification method thereof
Publication Date: 2020.07.14 MACRONIX INTERNATIONAL CO LTD
  • US10714197B1 patent drawing
  • US10714197B1 patent drawing
  • US10714197B1 patent drawing

AI summary

A memory device and a program verification method thereof are provided. The write verification method includes: reading a previous page to obtain first read data, writing input data to a current page, reading the previous page or the current page to obtain second read data, and analyzing at least one of the first read data and the second read data to determine whether to back up at least one of the first read data and the input data to a redundant block of the memory device.