NAND Flash Programming Method for Program Disturbance Prevention

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Solution Overview

Problem

Conventional channel boosting methods in NAND flash memory devices fail to effectively prevent program disturbance, especially when the selected memory cell is positioned at the end of a string, leading to reduced program disturbance prevention effects due to leakage currents caused by voltage differences between channel voltages and adjacent common source or bit lines.

Innovation Solution

A programming method that applies specific voltage adjustments to the common source line or unselected bit line during programming, ensuring that the channel voltage of unselected memory cells is maintained by increasing the voltage on the common source line or unselected bit line when the selected word line is adjacent to it, thereby preventing leakage currents and program disturbance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a program voltage is applied to a selected word line to program a selected memory cell, then the selected memory cell is programmed successfully, but program disturbance occurs in unselected memory cells sharing the same word line

Engineering Contradiction:
Improveprogramming accuracyVSAvoidprogram disturbance
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies different voltage levels to different word lines based on their position relative to the selected word line. Word lines adjacent to the selected word line receive a first voltage level, while other unselected word lines receive a second voltage level. This localized voltage differentiation prevents program disturbance in unselected memory cells while maintaining successful programming of the selected cell.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the voltage parameter applied to unselected word lines based on their positional relationship with the selected word line. By adjusting the voltage level dynamically according to position, the patent effectively controls the electric field distribution to prevent charge injection into unselected memory cells while allowing programming of the selected cell.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional channel boosting method is used to prevent program disturbance, then some protection is achieved, but the prevention effect decreases when the selected memory cell is at the end portion of the string

Engineering Contradiction:
Improveprogram disturbance preventionVSAvoidposition independence
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements position-dependent voltage boosting by applying different voltage levels to unselected word lines based on their proximity to the selected word line. Word lines immediately adjacent to the selected word line receive higher voltage levels compared to more distant unselected word lines. This localized quality approach ensures effective program disturbance prevention regardless of whether the selected memory cell is at the end portion or middle of the string.

Inventive Principle:
Principle #3Local quality

3Object-affected harmful factors

If unselected strings are floated by turning off select transistors to prevent program disturbance, then channel voltage can be boosted, but leakage currents occur due to voltage difference between channel and adjacent common source or bit lines

Engineering Contradiction:
Improveprogram disturbanceVSAvoidleakage current
Core Design Contradiction:
Object-affected harmful factorsVSLoss of energy

Solution Approach 1:

The patent reduces voltage differences between the channel of unselected strings and adjacent common source or bit lines by applying appropriate voltage levels to unselected word lines. This equipotentiality approach minimizes the electric field that drives leakage currents while still maintaining sufficient channel voltage to prevent program disturbance in unselected memory cells.

Inventive Principle:
Principle #12Equipotentiality

Data Source

PatentUS9070452B2Programming method of nonvolatile memory device
Publication Date: 2015.06.30 MIMIRIP LLC
  • US9070452B2 patent drawing
  • US9070452B2 patent drawing
  • US9070452B2 patent drawing

AI summary

Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line. The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line.