NAND Flash Memory Programming Short Channel Select Gate Punch-Through
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Solution Overview
Problem
Short channel select gates in NAND flash memory devices experience punch-through due to voltage and current breakdown, leading to undesirable current flow and limitations in reducing device size for increased memory density and performance.
Innovation Solution
Adjusting voltages for selected and unselected bitlines, drain select gate, pass, and program voltages to prevent punch-through, allowing for the use of shorter select gates and improving cell density by eliminating punch-through in short channel source-side select gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If select gate length is reduced to increase memory density, then device size decreases and memory density increases, but punch-through current flow increases due to voltage and current breakdown
Solution Approach 1:
The patent applies parameter changes by modifying the voltage levels applied to select gates and bit lines during programming operations. Specifically, it uses elevated select gate voltages (e.g., 10-20V) combined with corresponding bit line voltage adjustments to create a voltage gradient that prevents punch-through current flow while enabling successful programming of short channel select gates with lengths of 50nm or less
2Area of moving object
If select gate length is reduced to 50nm or less, then memory density increases, but device reliability decreases due to increased susceptibility to punch-through
Solution Approach 1:
The patent implements preliminary anti-action by pre-establishing protective voltage conditions before programming operations. It applies elevated select gate voltages in conjunction with specific bit line voltage sequences that create a voltage gradient across the select gate, preventing punch-through current flow from occurring during the programming process and thereby maintaining device reliability even with 50nm or shorter select gates
Data Source
AI summary
A programming method and memory structure for preventing punch-through in a short channel source-side select gate structure includes adjusting voltages on the selected and unselected bitlines, and the program, pass, and select gate voltages.