NAND Flash Memory Random Access via Block-Level Control
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Solution Overview
Problem
NAND-type flash memory devices face challenges in achieving high-speed reading and writing operations, particularly due to time-consuming bit line precharging during reading and inability to perform random access like NOR-type flash memory.
Innovation Solution
A semiconductor memory device with a memory array organized in a matrix, utilizing a vertical and horizontal selecting mechanism, and a controlling mechanism that includes a sense circuit to compare currents from data and reference memory cells for reading, and applies specific writing pulses to manage data and reference data in cell units, enabling random access and high-speed operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bit lines are precharged by a sense circuit in NAND-type flash memory, then reading operation can be performed, but the reading process becomes very time-consuming
Solution Approach 1:
The memory array is divided into multiple blocks, and reading operations are performed on a block-by-block basis. This segmentation allows the sense circuit to process data from smaller units, reducing the overall reading time compared to processing entire pages at once. The controller manages reading operations on individual blocks within a page, enabling more efficient data retrieval.
2Productivity
If NAND-type flash memory reads or programs in units of pages, then data storage and retrieval can be performed, but random access capability is lost
Solution Approach 1:
The memory access pattern is made dynamic by allowing the controller to selectively read and program individual blocks within a page rather than processing entire pages sequentially. This dynamic block-level access enables random access capability while maintaining the structured organization of the memory array, improving both productivity and ease of operation.
3Quantity of substance
If data memory cells are arranged adjacent to each other in the memory array, then storage density is increased, but reading speed and reliability are reduced
Solution Approach 1:
The memory array is organized with data memory cells and reference memory cells arranged in specific patterns where reference cells are positioned adjacent to data cells. This local arrangement allows the sense circuit to compare reference data with stored data during reading operations, improving reading reliability and speed without significantly reducing overall storage density. The controller manages access to these locally arranged cells to optimize performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for high-speed reading and writing operations with random access capabilities, improving data processing efficiency compared to conventional NAND-type flash memory devices.
Implementation Method 1
The sense circuit compares currents read from the data memory cell and the reference memory cell to determine the data stored in the data memory cell
Data Source
AI summary
The invention provides a NAND-type semiconductor memory device capable of high speed operation. A semiconductor memory device of the invention includes: a memory array, which forms a plurality of memory cells arranged in a matrix direction; a vertical selecting mechanism, which couples to the memory array, and selects the memory cells in a vertical direction of the memory array according to a vertical address signal; a horizontal selecting mechanism, which couples to the memory array, and selects the memory cells in a horizontal direction of the memory array according to a horizontal address signal; and a controlling mechanism, which reads data from the memory cells or writes data into the memory cells. A plurality of cell units is disposed in the memory array. Each cell unit is consisted of a data memory cell which storages data and a reference memory cell which storages reference data.