Deterministic Read Disturb Counter for NAND Flash Data Checking
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Solution Overview
Problem
Solid-state storage devices face performance degradation due to uncontrolled and unpredictable workloads causing simultaneous read disturb errors in memory blocks, leading to 'storms' that affect SSD controller performance.
Innovation Solution
A data storage device with an SSD controller that periodically retrieves counts from a counter table, selects memory blocks with the lowest read operations, determines data integrity, and dynamically adjusts the checking frequency and number of blocks to prevent simultaneous counter limit reaches, thereby managing read disturb errors and maintaining performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If block or page counters are employed with programmable limits to detect read disturb errors, then data integrity can be monitored, but performance degradation occurs when large numbers of counters simultaneously reach their limits causing 'storms'
Solution Approach 1:
The patent implements periodic checking of memory blocks by selecting a predetermined number of blocks with the lowest counts from the counter table at regular intervals. This periodic action prevents simultaneous checking storms while maintaining reliable detection of read disturb errors through systematic sampling of high-risk blocks.
Solution Approach 2:
The patent dynamically adjusts the checking process by periodically selecting memory blocks based on their current count values from the counter table. The system adapts to changing workload conditions by identifying blocks with the lowest counts (highest read disturb risk) and checking them, rather than using fixed checking schedules.
2Reliability
If all memory blocks are checked whenever counters reach limits, then all potential read disturb errors are detected, but the number of simultaneous checks becomes unpredictable and degrades performance
Solution Approach 1:
The patent checks a predetermined number of memory blocks (a partial subset) rather than all blocks that may have reached counter limits. By selecting only the blocks with the lowest counts from the counter table, the system performs sufficient checking to maintain reliability while avoiding the performance degradation caused by checking excessive blocks simultaneously.
3Reliability
If the checking frequency is increased to catch more read disturb errors, then data integrity improves, but resource utilization becomes unpredictable and performance varies
Solution Approach 1:
The patent establishes periodic checking intervals for memory blocks, ensuring consistent resource utilization while maintaining adequate data integrity protection. The predetermined number of blocks checked per period provides predictable performance characteristics while still catching read disturb errors that occur between checks.
Data Source
AI summary
A data storage device comprises a non-volatile semiconductor memory device and a solid-state drive controller communicatively coupled to the non-volatile semiconductor memory device. The non-volatile semiconductor memory device can store data in memory blocks. The solid-state drive controller can, periodically, retrieve counts from a counter table, select a predetermined number of memory blocks corresponding to the lowest counts, and determine an integrity of the stored data in each of the predetermined number of memory blocks. Each count can correspond to a difference between a count limit and a number of read operations performed on one of the memory blocks.