NAND Flash Continuous Read Resume Without Repeated Page Commands

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Solution Overview

Problem

NAND flash memory devices face inefficiencies in continuous reading operations due to the need for repeated input of page data read commands and addresses, which restricts data volume and compatibility with NOR flash memory systems, leading to longer read times and increased CPU processing loads.

Innovation Solution

A semiconductor memory device with a control element that determines whether to resume continuous reading based on pre-set page information, allowing for uninterrupted reading within a defined page range without the need for repeated page data read commands, using a page buffer and data register to manage data transfer and storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If NAND flash memory uses a serial interface with standard SPI protocol for compatibility, then ease of operation and adaptability improve, but reading speed decreases due to the need to read data to page buffer before output

Engineering Contradiction:
Improvecompatibility with NOR flash memory systemsVSAvoidreading speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent pre-loads page data into the page buffer before the actual read command is executed. By performing the data transfer from memory cell array to page buffer in advance (during the program or erase operation), the system eliminates the need to wait for data transfer during subsequent read operations, thereby improving reading speed while maintaining serial interface compatibility

Inventive Principle:
Principle #10Preliminary action

2Reliability

If NAND flash memory performs continuous reading by repeatedly inputting page data read commands and addresses, then data reading completeness is ensured, but loss of time increases due to repeated command input requirements

Engineering Contradiction:
Improvedata reading completenessVSAvoidread time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent enables continuous reading operations by maintaining the page buffer data availability throughout the read sequence. Once data is loaded into the page buffer, it remains there and can be continuously output via serial interface without requiring repeated page data read commands, thus achieving uninterrupted data output and reducing total read time while ensuring complete data retrieval

Inventive Principle:
Principle #20Continuity of useful action

3Measurement precision

If NAND flash memory requires specific page data read commands for continuous reading, then data reading accuracy is maintained, but device complexity increases due to different command requirements compared to NOR flash

Engineering Contradiction:
Improvedata reading accuracyVSAvoidcommand protocol complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent makes the page buffer serve multiple functions: it acts as both a data transfer buffer during program/erase operations and as a data output buffer during read operations. This multi-functionality allows the same hardware structure to handle both data transfer and data output tasks, reducing the need for separate command protocols and decreasing overall system complexity while maintaining reading accuracy

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Reliability

If NAND flash memory reads data to page buffer before serial output, then data integrity is ensured, but loss of time increases due to the additional data transfer step

Engineering Contradiction:
Improvedata integrityVSAvoiddata transfer time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs the data transfer from memory cell array to page buffer in advance during program or erase operations, rather than waiting until the read command is issued. This preliminary action ensures data is ready in the buffer before reading begins, maintaining data integrity through the buffering process while eliminating the time penalty of data transfer during the critical read phase

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10453524B2NAND flash memory device performing continuous reading operation using NOR compatible command, address and control scheme
Publication Date: 2019.10.22 WINBOND ELECTRONICS CORP
  • US10453524B2 patent drawing
  • US10453524B2 patent drawing
  • US10453524B2 patent drawing

AI summary

A semiconductor memory device, a flash memory and a continuous reading method thereof are provided for achieving a continuous reading of pages in high speed. A flash memory of the invention includes a memory cell array; a page reading element, which selects a page of the memory cell array and reads out data of the selected page to a page buffer/sense circuit; a page information storage element, which stores page information related to a range of a continuous reading; and a control element, which controls the continuous reading of the page. The control element determines whether to resume the continuous reading according to the page information. When it is determined to resume the continuous reading, the continuous reading can still be performed without a page data read command and a page address being inputted even if a chip select signal is toggled.