NAND Flash Read Voltage Adjustment for CVDDEs
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Solution Overview
Problem
Existing NAND flash memory devices face significant delays and inefficiencies in adjusting read voltage due to Cell Voltage Distribution Disruption Events (CVDDEs), as current methods only account for minor adjustments from wear and cell differences, failing to address the more drastic shifts caused by CVDDEs like Partial Block Program and Program-Read-Immediate.
Innovation Solution
A NAND flash memory device that detects CVDDEs and dynamically adjusts read voltage using extended addressing bits to access registers containing larger adjustment values stored in CVDDE registers, allowing for significant voltage shifts necessary to accommodate these events, while reverting to previous values when CVDDEs are resolved.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional read voltage adjustment methods are used, then device complexity is minimized, but read accuracy deteriorates due to inability to accommodate drastic voltage shifts from CVDDEs
Solution Approach 1:
The patent segments the voltage adjustment mechanism into two distinct paths: a first set of adjustment values for minor voltage shifts from wear and cell differences, and a second set of adjustment values for drastic voltage shifts from CVDDEs. This segmentation allows the system to maintain high read accuracy for both scenarios without requiring a completely complex redesign, as each segment handles its specific case efficiently.
Solution Approach 2:
The patent implements preliminary action by detecting CVDDEs before they cause read failures and proactively adjusting the read voltage using the second set of adjustment values. The system also pre-manages a queue of CVDDE events to anticipate and prepare for upcoming voltage disruptions, allowing timely voltage adjustments without waiting for actual read errors to occur.
2Measurement precision
If larger voltage adjustments are implemented to accommodate CVDDEs, then read accuracy improves, but the adjustment mechanism becomes more complex
Solution Approach 1:
The patent applies dynamics by making the voltage adjustment mechanism adaptive rather than static. The system dynamically selects between the first and second sets of adjustment values based on real-time detection of CVDDEs and wear conditions. This dynamic approach allows the adjustment mechanism to handle both minor and drastic voltage shifts without requiring a permanently complex configuration, as the complexity is only activated when needed.
Solution Approach 2:
The patent changes the parameter of voltage adjustment magnitude based on the detected condition. When CVDDEs are detected, the system switches to using the second set of adjustment values which provide larger voltage shifts. When only wear and cell differences are present, the first set of adjustment values with smaller magnitudes is used. This parameter change allows accurate voltage compensation without permanently increasing mechanism complexity.
3Productivity
If delayed voltage adjustments are made, then device operation is simpler, but read operations experience failures and retries
Solution Approach 1:
The patent implements feedback by continuously monitoring for CVDDEs and wear conditions, then using this information to adjust the read voltage in real-time. The system also manages a queue of CVDDE events and uses feedback from this queue to proactively prepare voltage adjustments before read operations are affected. This feedback mechanism ensures timely voltage adjustments without requiring overly complex manual management, as the system automatically responds to detected conditions.
Solution Approach 2:
The patent uses preliminary action by detecting and queueing CVDDE events before they impact read operations, then proactively adjusting the voltage using the second set of adjustment values. This preliminary detection and preparation allows the system to make timely voltage adjustments without waiting for read failures to occur, improving productivity while keeping voltage adjustment management relatively simple through automated event queue management.
Data Source
AI summary
A NAND flash memory device detects the occurrence of Cell Voltage Distribution Disruption Events (CVDDEs), such as a Partial Block Program (PBP) and Program-Read-Immediate (PM), and provides a way to dynamically adjust read voltage to account for CVDDEs. A read command includes extended addressing bits that are used when a CVDDE has occurred to access registers that indicate an adjustment to read voltage that is needed to accommodate the CVDDE. The read voltage is then dynamically adjusted to accommodate the CVDDE. When the CVDDE is no longer an issue, the read voltage is adjusted to its previous value before the CVDDE.