NAND Flash Memory Read Pass Voltage Control for ROM Area
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Solution Overview
Problem
NAND flash memory cells degrade with increasing write/erase operations, leading to data storage malfunctions and reading errors due to the stress of different operational conditions between ROM and normal storage areas.
Innovation Solution
A non-volatile semiconductor memory device design that applies distinct read pass voltages to memory cells in the ROM and normal storage areas, with the ROM area receiving a lower read pass voltage to reduce stress and prevent data corruption, while the normal storage area uses a higher voltage to account for data degradation from frequent write/erase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a uniform read pass voltage is applied to both ROM and normal storage areas, then the normal storage area can handle degraded memory cells from write/erase operations, but the ROM area experiences increased read disturb errors and data corruption
Solution Approach 1:
The patent applies different read pass voltages to different regions of the memory device: a first read pass voltage for the ROM area and a second read pass voltage for the normal storage area. This local differentiation allows each region to operate under optimized voltage conditions, reducing read disturb errors in the ROM area while maintaining reliability in the normal storage area where cells are more degraded from write/erase operations.
2Reliability
If a higher read pass voltage is applied to ensure accurate reading in degraded normal storage area, then reading reliability improves, but stress on ROM area memory cells increases causing data corruption
Solution Approach 1:
The patent implements region-specific voltage application where the control circuit applies a first read pass voltage to word lines connected to the ROM area and a second read pass voltage to word lines connected to the normal storage area. This ensures that the higher voltage needed for degraded cells in the normal storage area does not cause data corruption in the ROM area, while both regions achieve reliable reading.
3Device complexity
If the memory device uses a single voltage level for all read operations, then device complexity is reduced, but reading accuracy deteriorates due to different degradation states in different areas
Solution Approach 1:
The patent introduces dynamic voltage selection based on the operational region. The control circuit dynamically applies different read pass voltages depending on whether the read operation targets the ROM area or the normal storage area. This dynamic adaptation allows the device to maintain high reading accuracy across different regions without requiring a completely complex multi-voltage architecture, as the voltage selection is based on simple region identification.
Data Source
AI summary
A nonvolatile semiconductor memory device according to one embodiment includes a control circuit. The control circuit is configured to apply, when reading data of a first selected memory cell provided in a ROM area, a first read voltage to a first selected word line, and apply a first read pass voltage lower than a second read pass voltage to a first non-selected word line, thus allowing for the ROM area reading operation of reading a threshold voltage set in the first selected memory cell. The control circuit is configured to apply, when reading data of a second selected memory cell provided in a normal storage area, a second read voltage to a second selected word line, and apply the second read pass voltage to a second non-selected word line, thus allowing for a normal storage area reading operation of reading a threshold voltage set in the second selected memory cell.