NAND Flash Memory Read Voltage Control for Threshold Shift
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Solution Overview
Problem
NAND flash memory experiences a shift in threshold voltage distribution immediately after programming, making it difficult to set an optimal read voltage, leading to increased retry read operations and deteriorated read performance.
Innovation Solution
A memory system that divides the time after a write operation into a short term and a long term, adjusting the read voltage based on elapsed time during the short term and using a fixed voltage during the long term, with tables to store optimal read voltages for each period and history values to refine read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed read voltage is used for all read operations, then the device complexity is reduced, but read performance deteriorates due to threshold voltage shifts after programming
Solution Approach 1:
The patent segments the time period after programming into a short term period (immediately after programming) and a long term period (after the short term). Different read voltage strategies are applied to each segment: dynamic voltage adjustment for the short term and fixed voltage for the long term. This segmentation resolves the contradiction by allowing complex voltage adjustment only when necessary, while using simple fixed voltage otherwise.
Solution Approach 2:
The patent introduces dynamic read voltage adjustment during the short term period after programming, where the read voltage is changed based on the elapsed time since programming. This dynamic approach adapts to the threshold voltage shifts that occur immediately after programming, improving read performance without requiring continuous complex adjustment throughout all operation time.
2Reliability
If read voltage is adjusted dynamically to follow threshold voltage changes, then read performance improves, but device complexity increases due to multiple voltage levels and timing control
Solution Approach 1:
The patent divides the operational timeline into two segments: a short term period requiring dynamic voltage adjustment and a long term period using fixed voltage. This segmentation limits the complexity of voltage control to only the necessary short term period, avoiding the need for continuous complex adjustment throughout all operation time.
Solution Approach 2:
The patent performs preliminary voltage adjustment during the short term period after programming, before the threshold voltage distribution stabilizes. By addressing the voltage mismatch early while it is still manageable, the system avoids the need for more complex ongoing adjustment mechanisms throughout the entire operation lifecycle.
3Reliability
If retry read operations are performed to handle threshold voltage shifts, then data retrieval reliability improves, but the number of operations and time consumption increase
Solution Approach 1:
The patent applies preliminary voltage adjustment during the short term period after programming, before read operations are performed. This preliminary action prevents threshold voltage mismatches from causing read failures, thereby reducing or eliminating the need for retry read operations and the associated time consumption.
Solution Approach 2:
By proactively adjusting the read voltage immediately after programming during the short term period, the system skips over potential read failures that would require retry operations. This approach rushes through the voltage adjustment process early while the threshold voltage distribution is still stable, avoiding the need for time-consuming retry attempts later.
Data Source
AI summary
A memory system includes a nonvolatile semiconductor memory including memory cells storing data, and a controller configured to control a read operation of the nonvolatile semiconductor memory to read data from the nonvolatile semiconductor memory. The controller is configured to determine a read voltage to be used for reading data from the nonvolatile semiconductor memory depending on whether the read operation is performed during a first period after an end of a write operation of the data or during a second period following the first period, upon determining that the read operation is performed during the first period, change the read voltage in accordance with an elapsed time after the end of the write operation of the data, and upon determining that the read operation is performed during the second period, determine the read voltage regardless of the elapsed time after the end of the write operation of the data.


