NAND Flash Refresh Timing Based on Bit Error Rate Trends
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Solution Overview
Problem
In non-volatile semiconductor memory systems, such as NAND flash memory, the relationship between error correction performance and refresh operation timing is not appropriately managed, leading to increased read errors and reduced storage capacity or processing speed.
Innovation Solution
A memory system that calculates the bit error rate and determines the timing for the next refresh operation based on temporal changes in the bit error rate, using a memory controller to adjust the coding rate of variable length codes and manage the refresh operation to optimize error correction performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the coding rate is reduced (code is lengthened) to increase error correction performance, then error correction capability is improved, but storage capacity and processing speed deteriorate
Solution Approach 1:
The patent implements dynamic adjustment of coding rate based on the temporal changes in bit error rate. The memory controller monitors BER over time and adaptively selects coding rates, transitioning from static to dynamic error correction strategy. This allows the system to use stronger error correction only when necessary, maintaining high processing speed during normal operation while ensuring reliability when error rates increase.
Solution Approach 2:
The system changes the coding rate parameter based on observed bit error rate trends. By monitoring temporal changes in BER and adjusting the coding rate accordingly, the system optimizes the balance between error correction performance and processing speed. This parameter adaptation allows the system to respond to actual memory degradation rather than using a fixed conservative approach.
2Reliability
If refresh operation is performed frequently to maintain data integrity, then reliability is improved, but processing speed and storage capacity utilization deteriorate
Solution Approach 1:
The patent implements a feedback mechanism where the memory controller continuously monitors bit error rate and uses this information to determine refresh timing. The system measures BER, compares it against thresholds, and adjusts refresh operation frequency accordingly. This feedback-driven approach replaces fixed periodic refresh with adaptive refresh based on actual memory health, reducing unnecessary refresh operations while maintaining data integrity.
Solution Approach 2:
The refresh operation frequency is dynamically adjusted based on temporal changes in bit error rate. Instead of performing refresh at fixed intervals regardless of memory condition, the system adapts refresh timing to actual error trends, performing refresh more frequently when BER increases and less frequently when memory remains stable, thereby optimizing both reliability and processing speed.
3Ease of operation
If refresh operation is performed at fixed timing, then operation simplicity is maintained, but error correction performance may be insufficient when memory degradation occurs
Solution Approach 1:
The memory system performs self-diagnosis by monitoring its own bit error rate and automatically adjusts refresh timing based on observed degradation patterns. The memory controller detects temporal changes in BER and autonomously determines when refresh operations are needed, eliminating the need for external intervention or complex manual configuration while improving error correction performance.
Data Source
AI summary
According to one embodiment, a memory system includes a non-volatile semiconductor memory having a plurality of blocks each including a plurality of memory cells, and a memory controller configured to calculate a bit error rate when reading data from a block of the blocks and obtain an equation representing temporal changes in the bit error rate for the block, and based on the obtained equation, determine, for the block, a timing for performing a next refresh operation by which data that have been written to the block are rewritten.