NAND Flash Memory as Reprogrammable Logic Device

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Solution Overview

Problem

Existing programmable logic devices (PLDs) are limited in their ability to implement a large quantity of logic functions and are not reprogrammable once programmed, restricting their versatility and adaptability in electronic applications.

Innovation Solution

A NAND flash memory device is configured as a programmable logic device, allowing for the implementation of extended logic functions through the use of series strings of non-volatile memory cells, which can be reprogrammed by adjusting the threshold voltages of memory cells to represent different logical states, enabling the execution of complex logic functions and allowing for user reprogramming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional PLDs are used to implement logic functions, then logic function implementation is achieved, but the device is not reprogrammable and has limited versatility

Engineering Contradiction:
ImprovereprogrammabilityVSAvoidprogramming permanence
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent changes the fundamental parameter of memory cell threshold voltage to enable reprogrammability. By adjusting threshold voltage through different programming operations, the same physical memory structure can be reconfigured multiple times, transforming a non-reprogrammable device into a reprogrammable one without changing the underlying hardware architecture

Inventive Principle:
Principle #35Parameter changes

2Productivity

If PLDs are designed with fixed programming capacity, then manufacturing is simplified, but the quantity of implementable logic functions is limited

Engineering Contradiction:
Improvequantity of logic functionsVSAvoidprogramming configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces dynamic reconfigurability where the logic function implementation is not fixed during manufacturing but can be dynamically changed through software programming. This allows the device to adapt to different logic function requirements without physical reconfiguration, increasing the quantity of implementable functions while keeping the physical structure simple

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If memory cells are programmed to represent logical states, then logic function execution is enabled, but the complexity of implementing extended logic functions increases

Engineering Contradiction:
Improvelogic function capabilityVSAvoidseries string configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the logic function implementation into individual memory cells arranged in series strings. Each memory cell can be independently programmed to represent specific logical states, and the series string configuration allows complex logic functions to be built from simpler atomic operations, making the overall system more manageable and programmable

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables the NAND flash memory device to perform a wide range of logic functions, exceeding the limitations of traditional PLDs by allowing for reprogrammability and user-updatable functions, enhancing its applicability in various electronic applications.

Implementation Method 1

Changes in threshold voltage of the cells, through programming of a charge storage structure, such as floating gates or trapping layers or other physical phenomena, determine the data state of each cell

Methodology Applied
Scientific EffectCharge storage: Capacitance

Data Source

PatentUS10482972B2Memory as a programmable logic device
Publication Date: 2019.11.19 MICRON TECHNOLOGY INC
  • US10482972B2 patent drawing
  • US10482972B2 patent drawing
  • US10482972B2 patent drawing

AI summary

Memories include a data line, a plurality of strings of series-connected memory cells selectively connected to the data line, a plurality of first access lines each coupled to a control gate of a respective memory cell of each string of series-connected memory cells of the plurality of strings of series-connected memory cells, and a plurality of second access lines each coupled to a control gate of a respective memory cell of a respective string of series-connected memory cells of the plurality of strings of series-connected memory cells.