NAND Flash Memory Row Control Circuit Voltage Programming
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Solution Overview
Problem
The challenge in NAND-type flash memory devices is the reduction in program performance due to wide threshold voltage distribution among memory cells, which affects the storage capacity and efficiency of data programming.
Innovation Solution
A method and apparatus that involve a row control circuit generating specific voltage levels and applying them to selected and unselected word lines in a NAND-type flash memory device to ensure uniform programming speed across memory cells, thereby reducing parasitic capacitance and improving threshold voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If storage capacity is increased, then more memory cells can be stored, but program performance deteriorates due to wide threshold voltage distribution
Solution Approach 1:
A first pass voltage is applied to the selected word line before applying the program voltage. This preliminary action prepares the memory cell by adjusting the potential distribution in advance, ensuring that when the program voltage is subsequently applied, the threshold voltage distribution remains narrow and uniform across all memory cells, thereby maintaining high program performance even as storage capacity increases
Solution Approach 2:
The patent employs multiple voltage levels including a first pass voltage and a second pass voltage applied at different times. By dynamically changing voltage parameters during the programming process, the method optimizes the electric field distribution across memory cells, preventing wide threshold voltage distribution and maintaining manufacturing precision while scaling storage capacity
2Speed
If program voltage is applied directly to selected word line, then programming speed is fast, but non-uniform voltage distribution occurs across memory cells
Solution Approach 1:
The first pass voltage is applied as a preliminary step before the main program voltage. This prepares the electrical environment uniformly across all memory cells connected to the selected word line, ensuring that when the high-speed program voltage is subsequently applied, all cells receive consistent voltage distribution, maintaining both speed and uniformity
Solution Approach 2:
The patent uses a two-stage voltage application process where the first pass voltage transitions and the program voltage follow in sequence without interruption. This continuous action ensures uniform voltage distribution is maintained throughout the programming process, preventing variations while sustaining high programming speed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the program performance by ensuring uniform voltage distribution and increased transmission speed of program voltages to memory cells, leading to improved storage capacity and efficiency.
Implementation Method 1
A memory cell of the NAND-type flash memory device may perform erase and program operations using a Fowler-Nordheim (F-N) tunneling current
Data Source
AI summary
A method of operating a nonvolatile memory device may include applying a first voltage greater than a ground voltage to a selected word line during a first time period; applying a second voltage to an unselected word line during a second time period that is later than the first time period; and applying a third voltage greater than the first voltage and the second voltage to the selected word line during the second time period. The second time period includes a third time period during which a voltage level of the unselected word line increases to the second voltage from a fourth voltage that is less than the second voltage, and during which a voltage level of the selected word line increases to the third voltage from the first voltage.