NAND Flash Memory Cell Programming Uniformity via Segmented Access Line Voltage Control
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Solution Overview
Problem
In NAND flash memory devices, memory cells along an access line program at different rates due to voltage delays, leading to inconsistent programming and increased program disturb effects, necessitating more program voltage pulses with increasing voltages, which can affect already programmed cells.
Innovation Solution
Applying substantially equal voltage differences across memory cells at different locations along an access line using a controller to ensure they program at the same speed, reducing the number of program voltage pulses required and minimizing program disturb effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single program voltage pulse is applied to the beginning of the access line, then the memory cells closest to the beginning program faster, but the memory cells further away program more slowly and require additional voltage pulses with increasing voltages
Solution Approach 1:
The patent applies different voltage levels to different segments of the access line by dividing it into first and second segments with different voltage characteristics. The first segment receives a first voltage level while the second segment receives a second voltage level, allowing each segment to be optimized for its specific programming needs and achieving uniform programming across the entire access line.
Solution Approach 2:
The access line is divided into multiple segments (first and second segments) that can be independently controlled with different voltage levels. This segmentation allows the system to address the varying programming speeds at different locations along the access line by applying appropriate voltage levels to each segment.
2Reliability
If multiple program voltage pulses with increasing voltages are applied to program distant memory cells, then those cells program successfully, but already programmed memory cells near the beginning experience increased program disturb effects
Solution Approach 1:
The patent applies different voltage levels to different segments of the access line. The first segment (closer to the beginning) receives a first voltage level that is lower than the second voltage level applied to the second segment. This local differentiation ensures that already programmed cells near the beginning are not exposed to high voltages that would cause program disturb, while distant cells still receive sufficient voltage for complete programming.
3Area of stationary object
If the access line is long to cover more memory cells, then more cells can be accessed, but the RC delay increases causing greater voltage differences across cells at different locations
Solution Approach 1:
The patent divides the long access line into segments and applies different voltage levels to each segment. The first segment receives a first voltage level while the second segment receives a second voltage level, compensating for the RC delay effects that increase with distance. This allows the system to maintain voltage uniformity across the entire long access line while covering a large memory array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows memory cells to program uniformly, reducing the number of program voltage pulses needed and minimizing disturbances to already programmed cells, thereby improving programming efficiency and reliability.
Implementation Method 1
there is typically a voltage delay along the length of an access line due to resistive and capacitive effects (commonly referred to as an RC delay)
Implementation Method 2
there is typically a voltage delay along the length of an access line due to resistive and capacitive effects (commonly referred to as an RC delay)
Data Source
AI summary
An embodiment of a method of programing might include applying a first voltage difference across a first memory cell to be programed, where applying the first voltage difference comprises applying a first channel bias voltage to a channel of the first memory cell, and applying a second voltage difference, substantially equal to the first voltage difference, across a second memory cell to be programed while applying the first voltage difference across the first memory-cell, where applying the second voltage difference comprises applying a second channel bias voltage to a channel of the second memory cell. The first channel bias voltage is different than the second channel bias voltage, and the first memory cell and the second memory cell are commonly coupled to an access line and are at different locations along a length of the access line.