NAND Flash Select Gate Voltage Adjustment Circuit
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Solution Overview
Problem
In NAND flash memory, the select gate voltage during erase operations can become too high due to capacitive coupling, leading to electron tunneling and trapping issues that affect endurance and reliability, as it is challenging to adjust the final voltage of the select gate effectively.
Innovation Solution
A circuit with a capacitive coupling between a well and a select gate, including an adjustment unit that generates a driving voltage based on a non-constant voltage, and a switch to control the voltage applied to the select gate, allowing for the reduction of the coupling voltage and optimization of the select gate's voltage during erase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the select gate is coupled to high voltage due to capacitive coupling with p-well during erase operation, then the vertical electric field is reduced, but a large horizontal electric field exists between floating gate and select gate causing electron tunneling and depleting channel
Solution Approach 1:
The patent introduces a dummy word line as an intermediary element positioned between the select gate and the floating gate. This dummy word line acts as a mediator to block the direct capacitive coupling path that causes harmful electron tunneling, while still allowing the select gate to be properly coupled to high voltage through the p-well for erase operations. The intermediary structure selectively filters the electric field interactions.
Solution Approach 2:
The patent extracts the problematic direct capacitive coupling path between the select gate and floating gate by introducing the dummy word line as a separating layer. This effectively removes the harmful electron tunneling pathway while preserving the necessary vertical coupling between select gate and p-well through a different route.
2Reliability
If the select gate is coupled to low voltage, then electron tunneling is reduced, but the vertical electric field between select gate and p-well increases causing oxide stress and electron trapping
Solution Approach 1:
The dummy word line serves as an intermediary that enables the select gate to maintain low voltage (reducing horizontal electron tunneling) while still allowing proper vertical coupling to the p-well through the dummy word line structure. This mediator prevents direct stress on the oxide between select gate and p-well.
3Reliability
If the select gate voltage is adjusted to optimize endurance, then electron tunneling is reduced, but it becomes challenging to effectively control the final voltage of the select gate
Solution Approach 1:
The dummy word line structure enables the select gate voltage to self-adjust to optimal levels during erase operations. The capacitive coupling through the dummy word line automatically establishes the appropriate voltage distribution without requiring complex external control circuits, allowing the system to self-optimize for endurance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves the endurance of NAND flash memory by preventing excessive voltage coupling, reducing electron tunneling and trapping, and enhancing the reliability of the memory by allowing for optimal voltage adjustment during erase operations.
Implementation Method 1
There is a capacitive coupling between the well and the select gate
Implementation Method 2
Flash memories use Fowler-Nordheim (FN) tunneling from floating gates to p-well to erase flash cells
Implementation Method 3
Flash memories use Fowler-Nordheim (FN) tunneling from floating gates to p-well to erase flash cells
Data Source
AI summary
A circuit for adjusting a select gate voltage of a non-volatile memory is provided. The circuit includes a well, a select gate, and an adjustment unit. There is a capacitive coupling between the well and the select gate. The adjustment unit generates a driving voltage for the select gate based on a non-constant voltage.