NAND Flash Selection Transistors with Anti-Punchthrough Regions
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Solution Overview
Problem
NAND-type flash memory devices face limitations in suppressing the short channel effect and channel hot carrier effect due to increased channel concentration, leading to programming of non-selected cell transistors and reduced integration density.
Innovation Solution
Incorporating anti-punchthrough impurity regions surrounding selection gate patterns in NAND-type flash memory devices, which have a uniform impurity concentration and are designed to overlap with the edges of these patterns, reducing parasitic capacitance and leakage currents, thereby enhancing the self-boosting effect and suppressing short channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If channel concentration of selection transistors is increased to suppress short channel effect, then short channel effect is suppressed, but channel hot carrier effect occurs in non-selected string
Solution Approach 1:
The patent implements local quality by confining high dopant concentration to the channel region under the selection gate through the anti-punchthrough impurity region. This localized approach provides sufficient channel control to suppress hot carrier generation while avoiding the need for uniformly high channel concentration across the entire device, thereby reducing channel hot carrier effects in non-selected strings.
2Reliability
If channel concentration is increased to suppress short channel effect, then short channel effect is suppressed, but integration density is reduced
Solution Approach 1:
The patent achieves better integration density by applying local quality - placing high dopant concentration only where needed in the channel region beneath the selection gate. This eliminates the need for uniformly high channel concentration across the entire device, allowing for more compact cell transistor designs and improved overall integration density while maintaining effective short channel effect suppression.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The anti-punchthrough impurity regions effectively reduce the short channel effect and channel hot carrier effect, improving the operating speed and integration density of NAND-type flash memory devices by minimizing leakage currents and enhancing the self-boosting voltage of non-selected strings.
Implementation Method 1
anti-punchthrough impurity regions surrounding selection gate patterns... reducing parasitic capacitance and leakage currents
Implementation Method 2
reducing parasitic capacitance and leakage currents
Data Source
AI summary
A NAND-type flash memory device including selection transistors is provided. The device includes first and second impurity regions formed in a semiconductor substrate, and first and second selection gate patterns disposed on the semiconductor substrate between the first and second impurity regions. The first and second selection gate patterns are disposed adjacent to the first and second impurity regions, respectively. A plurality of cell gate patterns are disposed between the first and second selection gate patterns. A first anti-punchthrough impurity region that surrounds the first impurity region is provided in the semiconductor substrate. The first anti-punchthrough impurity region overlaps with a first edge of the first selection gate pattern adjacent to the first impurity region. A second anti-punchthrough impurity region that surrounds the second impurity region is provided in the semiconductor substrate. The second anti-punchthrough impurity region overlaps with a first edge of the second selection gate pattern adjacent to the second impurity region.