NAND Flash Self-Verification Programming Method
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Solution Overview
Problem
As memory devices shrink to smaller die sizes to reduce manufacturing costs and increase storage density, 3D NAND flash memory faces reliability challenges due to aggressive scaling, leading to data corruption issues from skipped verification of memory cells.
Innovation Solution
A programming method for NAND flash memory that includes multiple programming operations with varying voltages, followed by verification operations to ensure threshold voltage levels match programming data, and a self-verification read operation to confirm data integrity, with options to mask faulty cells and adjust read operations based on specified regions and caching usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If verification operations are skipped to increase programming speed, then productivity is improved, but reliability deteriorates due to data corruption
Solution Approach 1:
The patent performs verification operations during the programming process itself, rather than after completion. By verifying threshold voltage levels of programmed memory cells immediately after each programming operation, the system detects and corrects programming errors before they result in data corruption, thus maintaining reliability without sacrificing productivity
Solution Approach 2:
The patent implements a feedback mechanism where verification operations provide information about programming success, and this information is used to determine whether re-programming is necessary. The system monitors threshold voltage levels and uses this feedback to decide whether to re-program failed cells, ensuring data integrity while maintaining efficient programming operations
2Reliability
If multiple verification operations are performed to ensure data accuracy, then reliability is improved, but productivity deteriorates due to increased programming time
Solution Approach 1:
The patent performs verification operations on a selective basis rather than universally. Verification is performed on memory cells that are likely to have programming failures based on process conditions, and re-programming is applied only to cells that fail verification. This partial action approach ensures data accuracy for critical cells while minimizing the overall impact on programming time
Solution Approach 2:
The patent dynamically adjusts programming parameters such as voltage levels and pulse widths based on verification results. By changing programming parameters for re-programming operations, the system optimizes the balance between achieving reliable programming and minimizing the time required, adapting to the specific conditions of each memory cell
Data Source
AI summary
The present disclosure provides a method of data protection for a NAND memory. The method can include programming a selected page of the NAND flash memory device according to programming data. The programming of the selected page can include a plurality of programming operations and a plurality of verifying operations, with ones of the plurality of verifying operations performed after corresponding ones of the plurality of programming operations to determine whether programmed memory cells of the selected page have threshold voltage levels according to the programming data. The method can also include determining a completion of the programming of the selected page based on each of the plurality of verification operations returning a pass result. The method can also include performing, after the determining, a read operation on the selected page by the NAND flash memory device to self-verify data stored at the selected page according to the programming data.