NAND Flash Sense Node Capacitance Modulation for Read Margin
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Solution Overview
Problem
The finer design rules in NAND type flash memory cells lead to decreased on/off current ratios and reduced sense margins, increasing the likelihood of read errors due to increased leak currents and lower power-supply voltages, which conventional solutions fail to adequately address.
Innovation Solution
A semiconductor storage device with a NAND string and a SEN node connected to a capacitor, where the capacitance is rapidly decreased during discharge only when the selected memory cell is an on-cell, utilizing the C-V characteristic of an NMOS capacitor to enhance the discharge rate and maintain a large sense margin.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the design rule of the memory cell is made finer, then the capacity of the NAND type flash memory increases, but the on/off ratio of the memory cell decreases
Solution Approach 1:
A capacitor is introduced as an intermediary component connected between the sense node and the bit line. This capacitor temporarily stores charge and provides a boosting effect during the read operation, amplifying the voltage change at the sense node to enhance the sense margin without changing the memory cell structure or design rule
2Use of energy by moving object
If the power-supply voltage of the sense amplifier is decreased, then the power consumption is reduced, but the sense margin decreases
Solution Approach 1:
The capacitor is charged in advance during the pre-charge phase before the actual read operation. This preliminary charging action ensures that when the read operation occurs, the capacitor can immediately provide the necessary charge boosting effect to maintain adequate sense margin, even when operating at lower power-supply voltages
Solution Approach 2:
The invention changes the electrical parameters of the read operation by utilizing the capacitor's charge-discharge characteristics. The capacitor temporarily stores and releases charge to create a voltage boost at the sense node, effectively changing the voltage parameter during the read operation to maintain sense margin at reduced power-supply voltages
3Loss of energy
If the cell current is decreased, then the leak current increases, but the on/off ratio decreases
Solution Approach 1:
The capacitor acts as an intermediary that decouples the direct relationship between cell current and sense margin. By storing charge and providing a boosting effect, the capacitor allows the sense amplifier to detect smaller current differences more effectively, compensating for the reduced on/off ratio caused by increased leak current
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures a significant sense margin even with small on/off ratios, reducing read errors by differentiating the potential at the SEN node between on-cell and off-cell states, thereby improving data reading accuracy.
Implementation Method 1
a potential at the other end (BOOST2) of the capacitor 48c is stepped up and stepped down, whereby a potential at the sense node N4 is stepped up and stepped down by capacitance coupling
Data Source
AI summary
An embodiment of the invention provides a semiconductor storage device including a NAND string, a SEN node, and a capacitor. The NAND string includes plural series-connected memory cells, and one end of the NAND string is connected to a bit line while the other end is connected to a common source line. The SEN node is configured to be able to be electrically connected to a voltage source and the bit line. In the capacitor, one end is connected to the SEN node while the other end is connected to a CLK node to which a voltage within a predetermined range is applied. A discharge rate of the SEN node is enhanced by decreasing a capacitance during discharge of the SEN node only when a selected memory cell selected from the plural memory cells is an on-cell.