Hybrid NAND Flash Coding for Stuck Cell Error Correction
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Solution Overview
Problem
The presence of stuck cells in NAND flash memory systems, caused by manufacturing defects or aging, leads to readback errors that degrade system performance, especially when using low density parity check (LDPC) codes, as these codes fail to correct errors effectively in soft decision systems.
Innovation Solution
A hybrid encoding system is introduced, combining LDPC and Reed Solomon (RS) codes, where LSBs are encoded with LDPC and MSBs with RS codes, allowing for soft decision decoding of LSBs and hard decision decoding of MSBs, with Gray code mapping to improve error correction capabilities and tolerate stuck cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDPC codes are used for error correction in multi-level NAND flash memory, then soft information can be used to improve decoding performance, but the presence of stuck cells causes readback voltages that do not conform to long-term read channel statistics, severely degrading system performance
Solution Approach 1:
The patent segments the error correction task by dividing the data into multiple codewords and applying different decoding strategies to different portions. Specifically, it uses a first decoder for some codewords and a second decoder for others, allowing the system to handle stuck cell errors in certain codewords without compromising the decoding of other codewords. This segmentation isolates the impact of stuck cells to specific segments rather than affecting the entire data set.
Solution Approach 2:
The patent changes the decoding parameters dynamically based on detected error patterns. When stuck cell errors are detected in certain codewords, the system adjusts the decoding approach by switching between different decoders or modifying decoding thresholds. This parameter adaptation allows the system to optimize decoding performance for each specific codeword based on its error characteristics, particularly addressing the non-conforming readback voltages caused by stuck cells.
2Reliability
If stronger error correction codes are used to handle increased capacity and readback errors, then more errors can be corrected, but the system complexity increases and performance degrades when stuck cells are present
Solution Approach 1:
The patent divides the error correction system into multiple independent decoding paths, each handling specific codewords. This segmentation allows the use of complex error correction codes only where necessary, rather than applying maximum complexity to all data. By isolating stuck cell errors to specific segments, the system can use simpler decoding for unaffected segments, thereby reducing overall system complexity while maintaining high error correction capability.
Solution Approach 2:
The patent applies error correction selectively rather than uniformly across all data. By identifying and targeting only the codewords affected by stuck cell errors for intensive correction, the system avoids the overhead of applying full-strength error correction to all data. This partial action approach maintains high reliability for problematic segments while reducing unnecessary complexity in segments that don't require it.
3Quantity of substance
If multiple voltage levels are written to each flash cell to increase storage capacity, then more bits per cell can be stored, but the probability of readback errors increases
Solution Approach 1:
The patent segments the stored data into multiple codewords that can be independently decoded. This segmentation allows errors in specific voltage-level readings to be isolated to particular codewords without affecting the interpretation of other codewords. By dividing the high-capacity multi-level data into manageable segments with independent error correction, the system can tolerate readback errors while maintaining the benefits of high storage capacity.
Solution Approach 2:
The patent implements error correction codes before data is written to the flash memory, creating a protective buffer against future readback errors. This beforehand cushioning includes adding redundancy bits and establishing error detection/correction capabilities that prepare the system to handle the increased error probability inherent in multi-level storage, allowing the system to recover from readback errors even when storing multiple bits per cell.
Data Source
AI summary
A system for decoding data is disclosed. The system includes: an input interface configured to receive data associated with encoded data; a first decoder configured to decode a first subset of the encoded data to obtain a first portion of decoded data; a second decoder configured to decode a second subset of the encoded data to obtain a second portion of the decoded data, wherein the second portion includes decoded data not included in the first portion; and an output interface configured to output the decoded data.


